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authorMichel Dänzer <michel.daenzer@amd.com>2014-09-19 12:22:10 +0900
committerAlex Deucher <alexander.deucher@amd.com>2014-09-22 17:24:26 -0400
commitf55e03b975c230758c8f164347dfa10103f60e2c (patch)
tree4aaf9f9742ac37c6c44b43f69299ba720cb16693 /drivers/gpu/drm/radeon/evergreen.c
parent6cc2fda213d7a939e151ea1b5ec8033cce732c08 (diff)
drm/radeon: Update IH_RB_RPTR register after each processed interrupt
This might decrease the chance of IH ring buffer overflows. Signed-off-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/evergreen.c')
-rw-r--r--drivers/gpu/drm/radeon/evergreen.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c
index b0913705c1df..e50807c29f69 100644
--- a/drivers/gpu/drm/radeon/evergreen.c
+++ b/drivers/gpu/drm/radeon/evergreen.c
@@ -5137,6 +5137,7 @@ restart_ih:
/* wptr/rptr are in bytes! */
rptr += 16;
rptr &= rdev->ih.ptr_mask;
+ WREG32(IH_RB_RPTR, rptr);
}
if (queue_hotplug)
schedule_work(&rdev->hotplug_work);
@@ -5145,7 +5146,6 @@ restart_ih:
if (queue_thermal && rdev->pm.dpm_enabled)
schedule_work(&rdev->pm.dpm.thermal.work);
rdev->ih.rptr = rptr;
- WREG32(IH_RB_RPTR, rdev->ih.rptr);
atomic_set(&rdev->ih.lock, 0);
/* make sure wptr hasn't changed while processing */