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authorAlex Deucher <alexander.deucher@amd.com>2013-01-18 13:53:37 -0500
committerAlex Deucher <alexander.deucher@amd.com>2013-01-31 16:24:49 -0500
commitd3cb781e83b39561f717358e95d357e53a0da720 (patch)
tree35681fcb7b3d1d9c6016600b6078abadbec6f6a6 /drivers/gpu/drm/radeon/r600d.h
parent410a3418a88cc1273a281d347687f736fc39dd86 (diff)
drm/radeon: rework GPU reset on r6xx/r7xx
Update the code to better match the recommended programming sequence for soft reset. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/r600d.h')
-rw-r--r--drivers/gpu/drm/radeon/r600d.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/gpu/drm/radeon/r600d.h b/drivers/gpu/drm/radeon/r600d.h
index 62423b0eb2b9..494ef768966f 100644
--- a/drivers/gpu/drm/radeon/r600d.h
+++ b/drivers/gpu/drm/radeon/r600d.h
@@ -182,6 +182,8 @@
#define CP_COHER_BASE 0x85F8
#define CP_DEBUG 0xC1FC
#define R_0086D8_CP_ME_CNTL 0x86D8
+#define S_0086D8_CP_PFP_HALT(x) (((x) & 1)<<26)
+#define C_0086D8_CP_PFP_HALT(x) ((x) & 0xFBFFFFFF)
#define S_0086D8_CP_ME_HALT(x) (((x) & 1)<<28)
#define C_0086D8_CP_ME_HALT(x) ((x) & 0xEFFFFFFF)
#define CP_ME_RAM_DATA 0xC160