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authorAlex Deucher <alexander.deucher@amd.com>2013-04-09 12:41:24 -0400
committerAlex Deucher <alexander.deucher@amd.com>2013-06-25 17:50:24 -0400
commit8cc1a5328b7406063812e3341e8f02718b54e3bc (patch)
treea84c7dd16390467b0af69afa4dbb00a1edaeeee8 /drivers/gpu/drm/radeon/radeon.h
parentefad86db4ed09cb144bedf9fc69ae6233713f544 (diff)
drm/radeon: add gpu init support for CIK (v9)
v2: tiling fixes v3: more tiling fixes v4: more tiling fixes v5: additional register init v6: rebase v7: fix gb_addr_config for KV/KB v8: drop wip KV bits for now, add missing config reg v9: fix cu count on Bonaire Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/radeon.h')
-rw-r--r--drivers/gpu/drm/radeon/radeon.h30
1 files changed, 30 insertions, 0 deletions
diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h
index b50a786c851a..b1a223009a21 100644
--- a/drivers/gpu/drm/radeon/radeon.h
+++ b/drivers/gpu/drm/radeon/radeon.h
@@ -1505,6 +1505,35 @@ struct si_asic {
uint32_t tile_mode_array[32];
};
+struct cik_asic {
+ unsigned max_shader_engines;
+ unsigned max_tile_pipes;
+ unsigned max_cu_per_sh;
+ unsigned max_sh_per_se;
+ unsigned max_backends_per_se;
+ unsigned max_texture_channel_caches;
+ unsigned max_gprs;
+ unsigned max_gs_threads;
+ unsigned max_hw_contexts;
+ unsigned sc_prim_fifo_size_frontend;
+ unsigned sc_prim_fifo_size_backend;
+ unsigned sc_hiz_tile_fifo_size;
+ unsigned sc_earlyz_tile_fifo_size;
+
+ unsigned num_tile_pipes;
+ unsigned num_backends_per_se;
+ unsigned backend_disable_mask_per_asic;
+ unsigned backend_map;
+ unsigned num_texture_channel_caches;
+ unsigned mem_max_burst_length_bytes;
+ unsigned mem_row_size_in_kb;
+ unsigned shader_engine_tile_size;
+ unsigned num_gpus;
+ unsigned multi_gpu_tile_size;
+
+ unsigned tile_config;
+};
+
union radeon_asic_config {
struct r300_asic r300;
struct r100_asic r100;
@@ -1513,6 +1542,7 @@ union radeon_asic_config {
struct evergreen_asic evergreen;
struct cayman_asic cayman;
struct si_asic si;
+ struct cik_asic cik;
};
/*