diff options
| author | Christian König <christian.koenig@amd.com> | 2014-04-23 20:46:06 +0200 |
|---|---|---|
| committer | Christian König <christian.koenig@amd.com> | 2014-05-01 12:27:42 +0200 |
| commit | f5d636d2a74b755879feec35e14a259de52ccc07 (patch) | |
| tree | 2521a37a27117a354e681d044cf357656144ac37 /drivers/gpu/drm/radeon/radeon.h | |
| parent | e45187620f9fc103edf68fa5ea78e73033e1668c (diff) | |
drm/radeon: use pflip irq on R600+ v2
Testing the update pending bit directly after issuing an
update is nonsense cause depending on the pixel clock the
CRTC needs a bit of time to execute the flip even when we
are in the VBLANK period.
This is just a non invasive patch to solve the problem at
hand, a more complete and cleaner solution should follow
in the next merge window.
Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=76564
v2: fix source IDs for CRTC2-6
Signed-off-by: Christian König <christian.koenig@amd.com>
Cc: stable@vger.kernel.org
Diffstat (limited to 'drivers/gpu/drm/radeon/radeon.h')
| -rw-r--r-- | drivers/gpu/drm/radeon/radeon.h | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h index b58e1afdda76..68528619834a 100644 --- a/drivers/gpu/drm/radeon/radeon.h +++ b/drivers/gpu/drm/radeon/radeon.h @@ -730,6 +730,12 @@ struct cik_irq_stat_regs { u32 disp_int_cont4; u32 disp_int_cont5; u32 disp_int_cont6; + u32 d1grph_int; + u32 d2grph_int; + u32 d3grph_int; + u32 d4grph_int; + u32 d5grph_int; + u32 d6grph_int; }; union radeon_irq_stat_regs { |