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| author | Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> | 2020-05-13 11:58:50 -0400 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2021-08-26 13:57:33 -0400 |
| commit | 61d861cf478576d85d6032f864360a34b26084b1 (patch) | |
| tree | fbb055cadb2c73fda4d052213c8492db9dfe7461 /drivers/gpu/drm/radeon | |
| parent | b6d585041fd084ca28b605f8c9ca43aae9800ab1 (diff) | |
drm/amd/display: Move AllowDRAMSelfRefreshOrDRAMClockChangeInVblank to bounding box
[Why]
This is a global parameter, not a per pipe parameter and it's useful
for experimenting with the prefetch schedule to be adjustable from
the SOC bb.
[How]
Add a parameter to the SOC bb, default is the existing policy for
all DCN. Fill it in when filling SOC bb parameters.
Revert the policy to use MinDCFClk at the same time since that's not
going to give us P-State in most cases on the spreadsheet.
Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1403
Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Tested-by: Daniel Wheeler <Daniel.Wheeler@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/radeon')
0 files changed, 0 insertions, 0 deletions