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authorMark yao <mark.yao@rock-chips.com>2017-05-27 19:43:36 +0800
committerMark Yao <mark.yao@rock-chips.com>2017-05-31 11:13:34 +0800
commitefd11cc8fa1a6d8aba16bd6aaa774ecc3d02145f (patch)
tree4b5ff03a019b3b1894c42dfc9a8118c33ae63c47 /drivers/gpu/drm/rockchip/cdn-dp-core.c
parent82bc9a42cf854fdf63155759c0aa790bd1f361b0 (diff)
drm/rockchip: Correct vop out_mode configure
Force vop output mode on encoder driver seem not a good idea, EDP, HDMI, DisplayPort all have 10bit input on rk3399, On non-10bit vop, vop 8bit output bit[0-7] connect to the encoder high 8bit [2-9]. So force RGB10 to RGB888 on vop driver would be better. And another problem, EDP check crtc id on atomic_check, but encoder maybe NULL, so out_mode configure would fail, it cause edp no display. Signed-off-by: Mark Yao <mark.yao@rock-chips.com> Reviewed-by: Jeffy Chen <jeffy.chen@rock-chips.com> Link: http://patchwork.freedesktop.org/patch/msgid/1495885416-22216-1-git-send-email-mark.yao@rock-chips.com
Diffstat (limited to 'drivers/gpu/drm/rockchip/cdn-dp-core.c')
-rw-r--r--drivers/gpu/drm/rockchip/cdn-dp-core.c9
1 files changed, 2 insertions, 7 deletions
diff --git a/drivers/gpu/drm/rockchip/cdn-dp-core.c b/drivers/gpu/drm/rockchip/cdn-dp-core.c
index a2169dd3d26b..14fa1f8351e8 100644
--- a/drivers/gpu/drm/rockchip/cdn-dp-core.c
+++ b/drivers/gpu/drm/rockchip/cdn-dp-core.c
@@ -615,7 +615,6 @@ static void cdn_dp_encoder_enable(struct drm_encoder *encoder)
{
struct cdn_dp_device *dp = encoder_to_dp(encoder);
int ret, val;
- struct rockchip_crtc_state *state;
ret = drm_of_encoder_active_endpoint_id(dp->dev->of_node, encoder);
if (ret < 0) {
@@ -625,14 +624,10 @@ static void cdn_dp_encoder_enable(struct drm_encoder *encoder)
DRM_DEV_DEBUG_KMS(dp->dev, "vop %s output to cdn-dp\n",
(ret) ? "LIT" : "BIG");
- state = to_rockchip_crtc_state(encoder->crtc->state);
- if (ret) {
+ if (ret)
val = DP_SEL_VOP_LIT | (DP_SEL_VOP_LIT << 16);
- state->output_mode = ROCKCHIP_OUT_MODE_P888;
- } else {
+ else
val = DP_SEL_VOP_LIT << 16;
- state->output_mode = ROCKCHIP_OUT_MODE_AAAA;
- }
ret = cdn_dp_grf_write(dp, GRF_SOC_CON9, val);
if (ret)