diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2016-03-21 13:48:00 -0700 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2016-03-21 13:48:00 -0700 |
commit | 266c73b77706f2d05b4a3e70a5bb702ed35431d6 (patch) | |
tree | 381461b90a8bd10c0c36b0cdbb2e6e4bbf6c5e87 /drivers/gpu/drm/sti/sti_vid.c | |
parent | 2c856e14dad8cb1b085ae1f30c5e125c6d46019b (diff) | |
parent | 568d7c764ae01f3706085ac8f0d8a8ac7e826bd7 (diff) |
Merge branch 'drm-next' of git://people.freedesktop.org/~airlied/linux
Pull drm updates from Dave Airlie:
"This is the main drm pull request for 4.6 kernel.
Overall the coolest thing here for me is the nouveau maxwell signed
firmware support from NVidia, it's taken a long while to extract this
from them.
I also wish the ARM vendors just designed one set of display IP, ARM
display block proliferation is definitely increasing.
Core:
- drm_event cleanups
- Internal API cleanup making mode_fixup optional.
- Apple GMUX vga switcheroo support.
- DP AUX testing interface
Panel:
- Refactoring of DSI core for use over more transports.
New driver:
- ARM hdlcd driver
i915:
- FBC/PSR (framebuffer compression, panel self refresh) enabled by default.
- Ongoing atomic display support work
- Ongoing runtime PM work
- Pixel clock limit checks
- VBT DSI description support
- GEM fixes
- GuC firmware scheduler enhancements
amdkfd:
- Deferred probing fixes to avoid make file or link ordering.
amdgpu/radeon:
- ACP support for i2s audio support.
- Command Submission/GPU scheduler/GPUVM optimisations
- Initial GPU reset support for amdgpu
vmwgfx:
- Support for DX10 gen mipmaps
- Pageflipping and other fixes.
exynos:
- Exynos5420 SoC support for FIMD
- Exynos5422 SoC support for MIPI-DSI
nouveau:
- GM20x secure boot support - adds acceleration for Maxwell GPUs.
- GM200 support
- GM20B clock driver support
- Power sensors work
etnaviv:
- Correctness fixes for GPU cache flushing
- Better support for i.MX6 systems.
imx-drm:
- VBlank IRQ support
- Fence support
- OF endpoint support
msm:
- HDMI support for 8996 (snapdragon 820)
- Adreno 430 support
- Timestamp queries support
virtio-gpu:
- Fixes for Android support.
rockchip:
- Add support for Innosilicion HDMI
rcar-du:
- Support for 4 crtcs
- R8A7795 support
- RCar Gen 3 support
omapdrm:
- HDMI interlace output support
- dma-buf import support
- Refactoring to remove a lot of legacy code.
tilcdc:
- Rewrite of pageflipping code
- dma-buf support
- pinctrl support
vc4:
- HDMI modesetting bug fixes
- Significant 3D performance improvement.
fsl-dcu (FreeScale):
- Lots of fixes
tegra:
- Two small fixes
sti:
- Atomic support for planes
- Improved HDMI support"
* 'drm-next' of git://people.freedesktop.org/~airlied/linux: (1063 commits)
drm/amdgpu: release_pages requires linux/pagemap.h
drm/sti: restore mode_fixup callback
drm/amdgpu/gfx7: add MTYPE definition
drm/amdgpu: removing BO_VAs shouldn't be interruptible
drm/amd/powerplay: show uvd/vce power gate enablement for tonga.
drm/amd/powerplay: show uvd/vce power gate info for fiji
drm/amdgpu: use sched fence if possible
drm/amdgpu: move ib.fence to job.fence
drm/amdgpu: give a fence param to ib_free
drm/amdgpu: include the right version of gmc header files for iceland
drm/radeon: fix indentation.
drm/amd/powerplay: add uvd/vce dpm enabling flag to fix the performance issue for CZ
drm/amdgpu: switch back to 32bit hw fences v2
drm/amdgpu: remove amdgpu_fence_is_signaled
drm/amdgpu: drop the extra fence range check v2
drm/amdgpu: signal fences directly in amdgpu_fence_process
drm/amdgpu: cleanup amdgpu_fence_wait_empty v2
drm/amdgpu: keep all fences in an RCU protected array v2
drm/amdgpu: add number of hardware submissions to amdgpu_fence_driver_init_ring
drm/amdgpu: RCU protected amd_sched_fence_release
...
Diffstat (limited to 'drivers/gpu/drm/sti/sti_vid.c')
-rw-r--r-- | drivers/gpu/drm/sti/sti_vid.c | 125 |
1 files changed, 117 insertions, 8 deletions
diff --git a/drivers/gpu/drm/sti/sti_vid.c b/drivers/gpu/drm/sti/sti_vid.c index a8254cc362a1..5a2c5dc3687b 100644 --- a/drivers/gpu/drm/sti/sti_vid.c +++ b/drivers/gpu/drm/sti/sti_vid.c @@ -42,6 +42,104 @@ #define VID_MPR1_BT709 0x0AC50000 #define VID_MPR2_BT709 0x07150545 #define VID_MPR3_BT709 0x00000AE8 +/* YCbCr to RGB BT709: + * R = Y+1.3711Cr + * G = Y-0.6992Cr-0.3359Cb + * B = Y+1.7344Cb + */ +#define VID_MPR0_BT601 0x0A800000 +#define VID_MPR1_BT601 0x0AAF0000 +#define VID_MPR2_BT601 0x094E0754 +#define VID_MPR3_BT601 0x00000ADD + +#define VID_MIN_HD_HEIGHT 720 + +#define DBGFS_DUMP(reg) seq_printf(s, "\n %-25s 0x%08X", #reg, \ + readl(vid->regs + reg)) + +static void vid_dbg_ctl(struct seq_file *s, int val) +{ + val = val >> 30; + seq_puts(s, "\t"); + + if (!(val & 1)) + seq_puts(s, "NOT "); + seq_puts(s, "ignored on main mixer - "); + + if (!(val & 2)) + seq_puts(s, "NOT "); + seq_puts(s, "ignored on aux mixer"); +} + +static void vid_dbg_vpo(struct seq_file *s, int val) +{ + seq_printf(s, "\txdo:%4d\tydo:%4d", val & 0x0FFF, (val >> 16) & 0x0FFF); +} + +static void vid_dbg_vps(struct seq_file *s, int val) +{ + seq_printf(s, "\txds:%4d\tyds:%4d", val & 0x0FFF, (val >> 16) & 0x0FFF); +} + +static void vid_dbg_mst(struct seq_file *s, int val) +{ + if (val & 1) + seq_puts(s, "\tBUFFER UNDERFLOW!"); +} + +static int vid_dbg_show(struct seq_file *s, void *arg) +{ + struct drm_info_node *node = s->private; + struct sti_vid *vid = (struct sti_vid *)node->info_ent->data; + struct drm_device *dev = node->minor->dev; + int ret; + + ret = mutex_lock_interruptible(&dev->struct_mutex); + if (ret) + return ret; + + seq_printf(s, "VID: (vaddr= 0x%p)", vid->regs); + + DBGFS_DUMP(VID_CTL); + vid_dbg_ctl(s, readl(vid->regs + VID_CTL)); + DBGFS_DUMP(VID_ALP); + DBGFS_DUMP(VID_CLF); + DBGFS_DUMP(VID_VPO); + vid_dbg_vpo(s, readl(vid->regs + VID_VPO)); + DBGFS_DUMP(VID_VPS); + vid_dbg_vps(s, readl(vid->regs + VID_VPS)); + DBGFS_DUMP(VID_KEY1); + DBGFS_DUMP(VID_KEY2); + DBGFS_DUMP(VID_MPR0); + DBGFS_DUMP(VID_MPR1); + DBGFS_DUMP(VID_MPR2); + DBGFS_DUMP(VID_MPR3); + DBGFS_DUMP(VID_MST); + vid_dbg_mst(s, readl(vid->regs + VID_MST)); + DBGFS_DUMP(VID_BC); + DBGFS_DUMP(VID_TINT); + DBGFS_DUMP(VID_CSAT); + seq_puts(s, "\n"); + + mutex_unlock(&dev->struct_mutex); + return 0; +} + +static struct drm_info_list vid_debugfs_files[] = { + { "vid", vid_dbg_show, 0, NULL }, +}; + +static int vid_debugfs_init(struct sti_vid *vid, struct drm_minor *minor) +{ + unsigned int i; + + for (i = 0; i < ARRAY_SIZE(vid_debugfs_files); i++) + vid_debugfs_files[i].data = vid; + + return drm_debugfs_create_files(vid_debugfs_files, + ARRAY_SIZE(vid_debugfs_files), + minor->debugfs_root, minor); +} void sti_vid_commit(struct sti_vid *vid, struct drm_plane_state *state) @@ -52,6 +150,7 @@ void sti_vid_commit(struct sti_vid *vid, int dst_y = state->crtc_y; int dst_w = clamp_val(state->crtc_w, 0, mode->crtc_hdisplay - dst_x); int dst_h = clamp_val(state->crtc_h, 0, mode->crtc_vdisplay - dst_y); + int src_h = state->src_h >> 16; u32 val, ydo, xdo, yds, xds; /* Input / output size @@ -71,6 +170,19 @@ void sti_vid_commit(struct sti_vid *vid, writel((ydo << 16) | xdo, vid->regs + VID_VPO); writel((yds << 16) | xds, vid->regs + VID_VPS); + + /* Color conversion parameters */ + if (src_h >= VID_MIN_HD_HEIGHT) { + writel(VID_MPR0_BT709, vid->regs + VID_MPR0); + writel(VID_MPR1_BT709, vid->regs + VID_MPR1); + writel(VID_MPR2_BT709, vid->regs + VID_MPR2); + writel(VID_MPR3_BT709, vid->regs + VID_MPR3); + } else { + writel(VID_MPR0_BT601, vid->regs + VID_MPR0); + writel(VID_MPR1_BT601, vid->regs + VID_MPR1); + writel(VID_MPR2_BT601, vid->regs + VID_MPR2); + writel(VID_MPR3_BT601, vid->regs + VID_MPR3); + } } void sti_vid_disable(struct sti_vid *vid) @@ -91,20 +203,14 @@ static void sti_vid_init(struct sti_vid *vid) /* Opaque */ writel(VID_ALP_OPAQUE, vid->regs + VID_ALP); - /* Color conversion parameters */ - writel(VID_MPR0_BT709, vid->regs + VID_MPR0); - writel(VID_MPR1_BT709, vid->regs + VID_MPR1); - writel(VID_MPR2_BT709, vid->regs + VID_MPR2); - writel(VID_MPR3_BT709, vid->regs + VID_MPR3); - /* Brightness, contrast, tint, saturation */ writel(VID_BC_DFLT, vid->regs + VID_BC); writel(VID_TINT_DFLT, vid->regs + VID_TINT); writel(VID_CSAT_DFLT, vid->regs + VID_CSAT); } -struct sti_vid *sti_vid_create(struct device *dev, int id, - void __iomem *baseaddr) +struct sti_vid *sti_vid_create(struct device *dev, struct drm_device *drm_dev, + int id, void __iomem *baseaddr) { struct sti_vid *vid; @@ -120,5 +226,8 @@ struct sti_vid *sti_vid_create(struct device *dev, int id, sti_vid_init(vid); + if (vid_debugfs_init(vid, drm_dev->primary)) + DRM_ERROR("VID debugfs setup failed\n"); + return vid; } |