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authorThierry Reding <treding@nvidia.com>2017-11-13 11:08:13 +0100
committerThierry Reding <treding@nvidia.com>2017-12-13 14:16:37 +0100
commitc4755fb9064f64083fe559e92a46df817fc5e07b (patch)
tree4e5f79fbdeb8fa7bf9a886a30f5168a25186db14 /drivers/gpu/drm/tegra/Makefile
parent5acd351427361131c583dfb11c7bf4c364c98a9b (diff)
drm/tegra: Add Tegra186 display hub support
The display architecture has changed in several significant ways with the new Tegra186 SoC. Shared between all display controllers is a set of common resources referred to as the display hub. The hub generates accesses to memory and feeds them into various composition pipelines, each of which being a window that can be assigned to arbitrary heads. Atomic state is subclassed in order to track the global bandwidth requirements and select and adjust the hub clocks appropriately. The plane code is shared to a large degree with earlier SoC generations, except where the programming differs. Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'drivers/gpu/drm/tegra/Makefile')
-rw-r--r--drivers/gpu/drm/tegra/Makefile1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/tegra/Makefile b/drivers/gpu/drm/tegra/Makefile
index a47784765217..2e0d6213f6bc 100644
--- a/drivers/gpu/drm/tegra/Makefile
+++ b/drivers/gpu/drm/tegra/Makefile
@@ -5,6 +5,7 @@ tegra-drm-y := \
drm.o \
gem.o \
fb.o \
+ hub.o \
plane.o \
dc.o \
output.o \