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authorTejas Upadhyay <tejas.upadhyay@intel.com>2023-06-28 11:53:16 +0530
committerRodrigo Vivi <rodrigo.vivi@intel.com>2023-12-21 11:35:06 -0500
commite4b2893c17048aecb195553b60631fcb07360c4e (patch)
tree13150d6408e1fc76eddc535c20339c495e4d3141 /drivers/gpu/drm/xe/xe_mmio.c
parent9641df819772662429721f4b14141308fcf2d667 (diff)
drm/xe: Make usable size of VRAM readable
Current size member of vram struct does not give complete information as what "size" contains. Does it contain reserved portions or not. Name it usable size and accordingly describe other size members as well. Reviewed-by: Matthew Brost <matthew.brost@intel.com> Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com> Signed-off-by: Tejas Upadhyay <tejas.upadhyay@intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Diffstat (limited to 'drivers/gpu/drm/xe/xe_mmio.c')
-rw-r--r--drivers/gpu/drm/xe/xe_mmio.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/gpu/drm/xe/xe_mmio.c b/drivers/gpu/drm/xe/xe_mmio.c
index 7d92258cd35d..5effb21db9d4 100644
--- a/drivers/gpu/drm/xe/xe_mmio.c
+++ b/drivers/gpu/drm/xe/xe_mmio.c
@@ -289,13 +289,13 @@ int xe_mmio_probe_vram(struct xe_device *xe)
tile->mem.vram.base = tile_offset;
/* small bar can limit the visible size. size accordingly */
- tile->mem.vram.size = min_t(u64, vram_size, io_size);
+ tile->mem.vram.usable_size = min_t(u64, vram_size, io_size);
tile->mem.vram.mapping = xe->mem.vram.mapping + tile_offset;
drm_info(&xe->drm, "VRAM[%u, %u]: %pa, %pa\n", id, tile->id,
- &tile->mem.vram.io_start, &tile->mem.vram.size);
+ &tile->mem.vram.io_start, &tile->mem.vram.usable_size);
- if (tile->mem.vram.io_size < tile->mem.vram.size)
+ if (tile->mem.vram.io_size < tile->mem.vram.usable_size)
drm_info(&xe->drm, "VRAM[%u, %u]: CPU access limited to %pa\n", id,
tile->id, &tile->mem.vram.io_size);