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authorTao Zhou <tao.zhou1@amd.com>2020-10-02 11:30:54 -0400
committerAlex Deucher <alexander.deucher@amd.com>2020-10-12 14:00:18 -0400
commit550c58e0facd55aac5a316736b104f8428c4452e (patch)
tree8efa496c399e1bb492e815c6c645a13517ed2c15 /drivers/gpu/drm
parentf2a6c81d02de6c892d1ef323992f40de6f585f3f (diff)
drm/amdgpu: add common support for dimgrey_cavefish
Add external id and set clock gating for dimgrey_cavefish. Signed-off-by: Tao Zhou <tao.zhou1@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Jiansong Chen <Jiansong.Chen@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm')
-rw-r--r--drivers/gpu/drm/amd/amdgpu/nv.c6
1 files changed, 6 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/nv.c b/drivers/gpu/drm/amd/amdgpu/nv.c
index 2c2213d4908f..485c8907cc43 100644
--- a/drivers/gpu/drm/amd/amdgpu/nv.c
+++ b/drivers/gpu/drm/amd/amdgpu/nv.c
@@ -891,6 +891,11 @@ static int nv_common_early_init(void *handle)
adev->pg_flags = AMD_PG_SUPPORT_GFX_PG;
adev->external_rev_id = adev->rev_id + 0x01;
break;
+ case CHIP_DIMGREY_CAVEFISH:
+ adev->cg_flags = 0;
+ adev->pg_flags = 0;
+ adev->external_rev_id = adev->rev_id + 0x3c;
+ break;
default:
/* FIXME: not supported yet */
return -EINVAL;
@@ -1118,6 +1123,7 @@ static int nv_common_set_clockgating_state(void *handle,
case CHIP_NAVI12:
case CHIP_SIENNA_CICHLID:
case CHIP_NAVY_FLOUNDER:
+ case CHIP_DIMGREY_CAVEFISH:
adev->nbio.funcs->update_medium_grain_clock_gating(adev,
state == AMD_CG_STATE_GATE);
adev->nbio.funcs->update_medium_grain_light_sleep(adev,