diff options
| author | Stanislav Lisovskiy <stanislav.lisovskiy@intel.com> | 2020-05-13 12:38:13 +0300 |
|---|---|---|
| committer | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2020-05-13 16:21:20 +0300 |
| commit | d8d5afe35e3f88f73436f79f974d96a67e879637 (patch) | |
| tree | 75d2d5b21c22e7bae44969ab2f5a897998c19db8 /drivers/gpu/drm | |
| parent | 1d0a6c8486aa53f7545e80f5f0293ed99e48ffc0 (diff) | |
drm/i915: Make active_pipes check skl specific
Seems that only skl needs to have SAGV turned off
for multipipe scenarios, so lets do it this way.
If anything blows up - we can always revert this patch.
v2: Changed if condition to look better (Ville).
Signed-off-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
[vsyrjala: wrapped long line to appease checkpatch]
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200513093816.11466-4-stanislav.lisovskiy@intel.com
Diffstat (limited to 'drivers/gpu/drm')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_pm.c | 14 | ||||
| -rw-r--r-- | drivers/gpu/drm/i915/intel_pm.h | 3 |
2 files changed, 11 insertions, 6 deletions
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index 3df8e60c6153..f7bd1dbb625e 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -3777,7 +3777,7 @@ void intel_sagv_pre_plane_update(struct intel_atomic_state *state) if (!new_bw_state) return; - if (!intel_can_enable_sagv(new_bw_state)) + if (!intel_can_enable_sagv(dev_priv, new_bw_state)) intel_disable_sagv(dev_priv); } @@ -3800,7 +3800,7 @@ void intel_sagv_post_plane_update(struct intel_atomic_state *state) if (!new_bw_state) return; - if (intel_can_enable_sagv(new_bw_state)) + if (intel_can_enable_sagv(dev_priv, new_bw_state)) intel_enable_sagv(dev_priv); } @@ -3858,9 +3858,11 @@ static bool intel_crtc_can_enable_sagv(const struct intel_crtc_state *crtc_state return skl_crtc_can_enable_sagv(crtc_state); } -bool intel_can_enable_sagv(const struct intel_bw_state *bw_state) +bool intel_can_enable_sagv(struct drm_i915_private *dev_priv, + const struct intel_bw_state *bw_state) { - if (bw_state->active_pipes && !is_power_of_2(bw_state->active_pipes)) + if (INTEL_GEN(dev_priv) < 11 && + bw_state->active_pipes && !is_power_of_2(bw_state->active_pipes)) return false; return bw_state->pipe_sagv_reject == 0; @@ -3868,6 +3870,7 @@ bool intel_can_enable_sagv(const struct intel_bw_state *bw_state) static int intel_compute_sagv_mask(struct intel_atomic_state *state) { + struct drm_i915_private *dev_priv = to_i915(state->base.dev); int ret; struct intel_crtc *crtc; const struct intel_crtc_state *new_crtc_state; @@ -3901,7 +3904,8 @@ static int intel_compute_sagv_mask(struct intel_atomic_state *state) return ret; } - if (intel_can_enable_sagv(new_bw_state) != intel_can_enable_sagv(old_bw_state)) { + if (intel_can_enable_sagv(dev_priv, new_bw_state) != + intel_can_enable_sagv(dev_priv, old_bw_state)) { ret = intel_atomic_serialize_global_state(&new_bw_state->base); if (ret) return ret; diff --git a/drivers/gpu/drm/i915/intel_pm.h b/drivers/gpu/drm/i915/intel_pm.h index fd1dc422e6c5..614ac7f8d4cc 100644 --- a/drivers/gpu/drm/i915/intel_pm.h +++ b/drivers/gpu/drm/i915/intel_pm.h @@ -42,7 +42,8 @@ void skl_pipe_wm_get_hw_state(struct intel_crtc *crtc, struct skl_pipe_wm *out); void g4x_wm_sanitize(struct drm_i915_private *dev_priv); void vlv_wm_sanitize(struct drm_i915_private *dev_priv); -bool intel_can_enable_sagv(const struct intel_bw_state *bw_state); +bool intel_can_enable_sagv(struct drm_i915_private *dev_priv, + const struct intel_bw_state *bw_state); int intel_enable_sagv(struct drm_i915_private *dev_priv); int intel_disable_sagv(struct drm_i915_private *dev_priv); void intel_sagv_pre_plane_update(struct intel_atomic_state *state); |