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author | Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> | 2022-09-27 17:41:40 -0700 |
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committer | Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> | 2022-10-03 11:29:16 -0700 |
commit | 087b681805f1de084f89f1041af67295aa981192 (patch) | |
tree | 60ac30e81fcb2d9aeefd9aee77196939264a7d64 /drivers/gpu/host1x | |
parent | 887a193b4fb13e886d34bea4a1d8711fd775c7cf (diff) |
drm/i915/dg2: setup HuC loading via GSC
The GSC will perform both the load and the authentication, so we just
need to check the auth bit after the GSC has replied.
Since we require the PXP module to load the HuC, the earliest we can
trigger the load is during the pxp_bind operation.
Note that GSC-loaded HuC survives GT reset, so we need to just mark it
as ready when we re-init the GT HW.
V2: move setting of HuC fw error state to the failure path of the HuC
auth function, so it covers both the legacy and new auth flows
V4:
1. Fix typo in the commit message
2. style fix in intel_huc_wait_for_auth_complete()
Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Signed-off-by: Vitaly Lubart <vitaly.lubart@intel.com>
Signed-off-by: Tomas Winkler <tomas.winkler@intel.com>
Reviewed-by: Alan Previn <alan.previn.teres.alexis@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220928004145.745803-11-daniele.ceraolospurio@intel.com
Diffstat (limited to 'drivers/gpu/host1x')
0 files changed, 0 insertions, 0 deletions