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| author | Philipp Zabel <p.zabel@pengutronix.de> | 2015-01-08 00:04:04 +0100 |
|---|---|---|
| committer | Philipp Zabel <p.zabel@pengutronix.de> | 2015-02-23 17:18:59 +0100 |
| commit | 89ce4b0f4e7adda75ac7eec6aaa9b3516390cef2 (patch) | |
| tree | c0e2cabe2de7afdc79eecbc21ed7d1c0a804a363 /drivers/gpu/ipu-v3/ipu-di.c | |
| parent | c517d838eb7d07bbe9507871fab3931deccff539 (diff) | |
gpu: ipu-v3: do not divide by zero if the pixel clock is too large
Even if an unsupported mode with a pixel clock larger than two times the
264 MHz IPU HSP clock is set, don't divide by zero.
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Diffstat (limited to 'drivers/gpu/ipu-v3/ipu-di.c')
| -rw-r--r-- | drivers/gpu/ipu-v3/ipu-di.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/gpu/ipu-v3/ipu-di.c b/drivers/gpu/ipu-v3/ipu-di.c index b61d6be97602..3ddfb3d0b64d 100644 --- a/drivers/gpu/ipu-v3/ipu-di.c +++ b/drivers/gpu/ipu-v3/ipu-di.c @@ -459,6 +459,8 @@ static void ipu_di_config_clock(struct ipu_di *di, clkrate = clk_get_rate(di->clk_ipu); div = DIV_ROUND_CLOSEST(clkrate, sig->mode.pixelclock); + if (div == 0) + div = 1; rate = clkrate / div; error = rate / (sig->mode.pixelclock / 1000); |