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authorJames Willcox <jwillcox@squareup.com>2021-05-25 16:13:15 +0300
committerRob Clark <robdclark@chromium.org>2021-06-23 07:33:56 -0700
commit310317719ef1735da2fa2e36375889ff90fd89c8 (patch)
treefe1716c56f72d4b74543d90da31650e5b7badb42 /drivers/gpu
parent7d36db0be3b9f906b291c40c805746a63754a455 (diff)
drm/msm/mdp5: add perf blocks for holding fudge factors
Prior downstream kernels had "fudge factors" in devicetree which would be applied to things like interconnect bandwidth calculations. Bring some of those values back here. Signed-off-by: James Willcox <jwillcox@squareup.com> [DB: changed _ff to _inefficiency, fixed patch description] Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20210525131316.3117809-7-dmitry.baryshkov@linaro.org Signed-off-by: Rob Clark <robdclark@chromium.org>
Diffstat (limited to 'drivers/gpu')
-rw-r--r--drivers/gpu/drm/msm/disp/mdp5/mdp5_cfg.c35
-rw-r--r--drivers/gpu/drm/msm/disp/mdp5/mdp5_cfg.h7
2 files changed, 42 insertions, 0 deletions
diff --git a/drivers/gpu/drm/msm/disp/mdp5/mdp5_cfg.c b/drivers/gpu/drm/msm/disp/mdp5/mdp5_cfg.c
index 94ce62a26daf..9741544ffc35 100644
--- a/drivers/gpu/drm/msm/disp/mdp5/mdp5_cfg.c
+++ b/drivers/gpu/drm/msm/disp/mdp5/mdp5_cfg.c
@@ -95,6 +95,11 @@ static const struct mdp5_cfg_hw msm8x74v1_config = {
[3] = INTF_HDMI,
},
},
+ .perf = {
+ .ab_inefficiency = 200,
+ .ib_inefficiency = 120,
+ .clk_inefficiency = 125
+ },
.max_clk = 200000000,
};
@@ -177,6 +182,11 @@ static const struct mdp5_cfg_hw msm8x74v2_config = {
[3] = INTF_HDMI,
},
},
+ .perf = {
+ .ab_inefficiency = 200,
+ .ib_inefficiency = 120,
+ .clk_inefficiency = 125
+ },
.max_clk = 320000000,
};
@@ -272,6 +282,11 @@ static const struct mdp5_cfg_hw apq8084_config = {
[3] = INTF_HDMI,
},
},
+ .perf = {
+ .ab_inefficiency = 200,
+ .ib_inefficiency = 120,
+ .clk_inefficiency = 105
+ },
.max_clk = 320000000,
};
@@ -339,6 +354,11 @@ static const struct mdp5_cfg_hw msm8x16_config = {
[1] = INTF_DSI,
},
},
+ .perf = {
+ .ab_inefficiency = 100,
+ .ib_inefficiency = 200,
+ .clk_inefficiency = 105
+ },
.max_clk = 320000000,
};
@@ -414,6 +434,11 @@ static const struct mdp5_cfg_hw msm8x36_config = {
[2] = INTF_DSI,
},
},
+ .perf = {
+ .ab_inefficiency = 100,
+ .ib_inefficiency = 200,
+ .clk_inefficiency = 105
+ },
.max_clk = 366670000,
};
@@ -509,6 +534,11 @@ static const struct mdp5_cfg_hw msm8x94_config = {
[3] = INTF_HDMI,
},
},
+ .perf = {
+ .ab_inefficiency = 100,
+ .ib_inefficiency = 100,
+ .clk_inefficiency = 105
+ },
.max_clk = 400000000,
};
@@ -617,6 +647,11 @@ static const struct mdp5_cfg_hw msm8x96_config = {
[3] = INTF_HDMI,
},
},
+ .perf = {
+ .ab_inefficiency = 100,
+ .ib_inefficiency = 200,
+ .clk_inefficiency = 105
+ },
.max_clk = 412500000,
};
diff --git a/drivers/gpu/drm/msm/disp/mdp5/mdp5_cfg.h b/drivers/gpu/drm/msm/disp/mdp5/mdp5_cfg.h
index 1c50d01f15f5..6b03d7899309 100644
--- a/drivers/gpu/drm/msm/disp/mdp5/mdp5_cfg.h
+++ b/drivers/gpu/drm/msm/disp/mdp5/mdp5_cfg.h
@@ -76,6 +76,12 @@ struct mdp5_intf_block {
u32 connect[MDP5_INTF_NUM_MAX]; /* array of enum mdp5_intf_type */
};
+struct mdp5_perf_block {
+ u32 ab_inefficiency;
+ u32 ib_inefficiency;
+ u32 clk_inefficiency;
+};
+
struct mdp5_cfg_hw {
char *name;
@@ -93,6 +99,7 @@ struct mdp5_cfg_hw {
struct mdp5_sub_block dsc;
struct mdp5_sub_block cdm;
struct mdp5_intf_block intf;
+ struct mdp5_perf_block perf;
uint32_t max_clk;
};