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authorDmitry Osipenko <digetx@gmail.com>2018-05-08 19:26:05 +0300
committerThierry Reding <treding@nvidia.com>2018-05-18 12:35:07 +0200
commitefc351b1f46f55ba3f9fa83c490c55243c3a676b (patch)
tree621b706c8b45dd7c5aad6af59ebc50ab3539b8bb /drivers/hv
parent08a52593fc0dca4b798f9a222cfbc827d008c1bf (diff)
clk: tegra20: Correct parents of CDEV1/2 clocks
Parents of CDEV1/2 clocks are determined by muxing of the corresponding pins. Pinctrl driver now provides the CDEV1/2 clock muxes and hence CDEV1/2 clocks could have correct parents. Set CDEV1/2 parents to the corresponding muxes to fix the parents. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Reviewed-by: Marcel Ziswiler <marcel@ziswiler.com> Tested-by: Marcel Ziswiler <marcel@ziswiler.com> Tested-by: Marc Dietrich <marvin24@gmx.de> Acked-by: Peter De Schrijver <pdeschrijver@nvidia.com> Acked-by: Stephen Boyd <sboyd@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'drivers/hv')
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