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authoramy.shih <amy.shih@advantech.com.tw>2085-06-18 15:57:19 +0000
committerGuenter Roeck <linux@roeck-us.net>2019-09-03 12:47:17 -0700
commit4a2d78822fdf1556dfbbfaedd71182fe5b562194 (patch)
tree04d6a008000472754fc5188a9258091620ec6702 /drivers/hwmon
parent7b1b68f013e8cf4f5e7f6eedba5f0b3f9226e7e3 (diff)
hwmon: (nct7904) Fix incorrect temperature limitation register setting of LTD.
According to kernel hwmon sysfs-interface documentation, temperature critical max value, typically greater than corresponding temp_max values. Thus, reads the LTD_HV_HL (LTD HIGH VALUE HIGH LIMITATION) and LTD_LV_HL (LTD LOW VALUE HIGH LIMITATION) for case hwmon_temp_crit and hwmon_temp_crit_hyst. Reads the LTD_HV_LL (HIGH VALUE LOW LIMITATION) and LTD_LV_LL (LOW VALUE LOW LIMITATION) for case hwmon_temp_max and hwmon_temp_max_hyst. Signed-off-by: amy.shih <amy.shih@advantech.com.tw> Link: https://lore.kernel.org/r/20850618155720.24857-1-Amy.Shih@advantech.com.tw Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Diffstat (limited to 'drivers/hwmon')
-rw-r--r--drivers/hwmon/nct7904.c16
1 files changed, 8 insertions, 8 deletions
diff --git a/drivers/hwmon/nct7904.c b/drivers/hwmon/nct7904.c
index 76372f20d71a..ce688ab4fce2 100644
--- a/drivers/hwmon/nct7904.c
+++ b/drivers/hwmon/nct7904.c
@@ -398,22 +398,22 @@ static int nct7904_read_temp(struct device *dev, u32 attr, int channel,
}
return 0;
case hwmon_temp_max:
- reg1 = LTD_HV_HL_REG;
+ reg1 = LTD_HV_LL_REG;
reg2 = TEMP_CH1_W_REG;
reg3 = DTS_T_CPU1_W_REG;
break;
case hwmon_temp_max_hyst:
- reg1 = LTD_LV_HL_REG;
+ reg1 = LTD_LV_LL_REG;
reg2 = TEMP_CH1_WH_REG;
reg3 = DTS_T_CPU1_WH_REG;
break;
case hwmon_temp_crit:
- reg1 = LTD_HV_LL_REG;
+ reg1 = LTD_HV_HL_REG;
reg2 = TEMP_CH1_C_REG;
reg3 = DTS_T_CPU1_C_REG;
break;
case hwmon_temp_crit_hyst:
- reg1 = LTD_LV_LL_REG;
+ reg1 = LTD_LV_HL_REG;
reg2 = TEMP_CH1_CH_REG;
reg3 = DTS_T_CPU1_CH_REG;
break;
@@ -507,22 +507,22 @@ static int nct7904_write_temp(struct device *dev, u32 attr, int channel,
switch (attr) {
case hwmon_temp_max:
- reg1 = LTD_HV_HL_REG;
+ reg1 = LTD_HV_LL_REG;
reg2 = TEMP_CH1_W_REG;
reg3 = DTS_T_CPU1_W_REG;
break;
case hwmon_temp_max_hyst:
- reg1 = LTD_LV_HL_REG;
+ reg1 = LTD_LV_LL_REG;
reg2 = TEMP_CH1_WH_REG;
reg3 = DTS_T_CPU1_WH_REG;
break;
case hwmon_temp_crit:
- reg1 = LTD_HV_LL_REG;
+ reg1 = LTD_HV_HL_REG;
reg2 = TEMP_CH1_C_REG;
reg3 = DTS_T_CPU1_C_REG;
break;
case hwmon_temp_crit_hyst:
- reg1 = LTD_LV_LL_REG;
+ reg1 = LTD_LV_HL_REG;
reg2 = TEMP_CH1_CH_REG;
reg3 = DTS_T_CPU1_CH_REG;
break;