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authorLinus Walleij <linus.walleij@linaro.org>2016-09-01 11:44:39 +0200
committerJonathan Cameron <jic23@kernel.org>2016-09-18 11:27:18 +0100
commitab04f734b08a404550ba5f8391307bad2145acff (patch)
tree6b6879bd4c737206317fc649fc5fe5b22c9d200b /drivers/iio/accel/kxsd9.h
parentbf96f6e80cef4b9a234e8ce81aa2e333ca7ce599 (diff)
iio: accel: kxsd9: Do away with the write2 helper
This is just a masquerading register write function, so use the register write function instead. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Tested-by: Jonathan Cameron <jic23@kernel.org> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
Diffstat (limited to 'drivers/iio/accel/kxsd9.h')
-rw-r--r--drivers/iio/accel/kxsd9.h2
1 files changed, 0 insertions, 2 deletions
diff --git a/drivers/iio/accel/kxsd9.h b/drivers/iio/accel/kxsd9.h
index 28845c3440e9..b6328e88b56f 100644
--- a/drivers/iio/accel/kxsd9.h
+++ b/drivers/iio/accel/kxsd9.h
@@ -11,7 +11,6 @@ struct kxsd9_transport;
* @trdev: transport device such as SPI or I2C
* @readreg(): function to read a byte from an address in the device
* @writereg(): function to write a byte to an address in the device
- * @write2(): function to write two consecutive bytes to the device
* @readval(): function to read a 16bit value from the device
* @rx: cache aligned read buffer
* @tx: cache aligned write buffer
@@ -20,7 +19,6 @@ struct kxsd9_transport {
void *trdev;
int (*readreg) (struct kxsd9_transport *tr, u8 address);
int (*writereg) (struct kxsd9_transport *tr, u8 address, u8 val);
- int (*write2) (struct kxsd9_transport *tr, u8 b1, u8 b2);
int (*readval) (struct kxsd9_transport *tr, u8 address);
u8 rx[KXSD9_STATE_RX_SIZE] ____cacheline_aligned;
u8 tx[KXSD9_STATE_TX_SIZE];