summaryrefslogtreecommitdiff
path: root/drivers/iio/dac/ad5686.h
diff options
context:
space:
mode:
authorStefan Popa <stefan.popa@analog.com>2018-05-18 18:22:50 +0300
committerJonathan Cameron <Jonathan.Cameron@huawei.com>2018-05-20 11:36:28 +0100
commitbe1b24d2454117113260f2fe59a427d01de4e131 (patch)
tree86703420717408d4152132e41889fdb7550822f1 /drivers/iio/dac/ad5686.h
parented582db639cfe65e2d901fca1be8fd813a18fec4 (diff)
iio:dac:ad5686: Add AD5691R/AD5692R/AD5693/AD5693R support
The AD5691R/AD5692R/AD5693/AD5693R are a family of one channel DACs with 12-bit, 14-bit and 16-bit precision respectively. The devices have either no built-in reference, or built-in 2.5V reference. These devices are pretty similar to AD5671R/AD5675R and AD5694/AD5694R/AD5695R/AD5696/AD5696R, except that they have one channel. Another difference is that they use a write control register(addr 0x04) for setting the power down modes and the internal reference instead of separate registers for each function. Datasheet: http://www.analog.com/media/en/technical-documentation/data-sheets/AD5693R_5692R_5691R_5693.pdf Signed-off-by: Stefan Popa <stefan.popa@analog.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Diffstat (limited to 'drivers/iio/dac/ad5686.h')
-rw-r--r--drivers/iio/dac/ad5686.h16
1 files changed, 16 insertions, 0 deletions
diff --git a/drivers/iio/dac/ad5686.h b/drivers/iio/dac/ad5686.h
index 05f0ce9d2de1..6c6879db60e4 100644
--- a/drivers/iio/dac/ad5686.h
+++ b/drivers/iio/dac/ad5686.h
@@ -35,6 +35,9 @@
#define AD5686_LDAC_PWRDN_100K 0x2
#define AD5686_LDAC_PWRDN_3STATE 0x3
+#define AD5686_CMD_CONTROL_REG 0x4
+#define AD5693_REF_BIT_MSK BIT(12)
+
/**
* ad5686_supported_device_ids:
*/
@@ -49,6 +52,10 @@ enum ad5686_supported_device_ids {
ID_AD5685R,
ID_AD5686,
ID_AD5686R,
+ ID_AD5691R,
+ ID_AD5692R,
+ ID_AD5693,
+ ID_AD5693R,
ID_AD5694,
ID_AD5694R,
ID_AD5695R,
@@ -56,6 +63,11 @@ enum ad5686_supported_device_ids {
ID_AD5696R,
};
+enum ad5686_regmap_type {
+ AD5686_REGMAP,
+ AD5693_REGMAP
+};
+
struct ad5686_state;
typedef int (*ad5686_write_func)(struct ad5686_state *st,
@@ -68,12 +80,14 @@ typedef int (*ad5686_read_func)(struct ad5686_state *st, u8 addr);
* @int_vref_mv: AD5620/40/60: the internal reference voltage
* @num_channels: number of channels
* @channel: channel specification
+ * @regmap_type: register map layout variant
*/
struct ad5686_chip_info {
u16 int_vref_mv;
unsigned int num_channels;
struct iio_chan_spec *channels;
+ enum ad5686_regmap_type regmap_type;
};
/**
@@ -84,6 +98,7 @@ struct ad5686_chip_info {
* @vref_mv: actual reference voltage used
* @pwr_down_mask: power down mask
* @pwr_down_mode: current power down mode
+ * @use_internal_vref: set to true if the internal reference voltage is used
* @data: spi transfer buffers
*/
@@ -96,6 +111,7 @@ struct ad5686_state {
unsigned int pwr_down_mode;
ad5686_write_func write;
ad5686_read_func read;
+ bool use_internal_vref;
/*
* DMA (thus cache coherency maintenance) requires the