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authorJonathan Cameron <Jonathan.Cameron@huawei.com>2022-05-08 18:56:54 +0100
committerJonathan Cameron <Jonathan.Cameron@huawei.com>2022-06-14 11:53:18 +0100
commit966d2f4ee7f6e189df47abf67223266ad31e201f (patch)
treee246a7367268a54a85f78923b17be46c74e6b884 /drivers/iio/gyro
parentff3211b2ba9afac80ceb795d148831dd879b30b7 (diff)
iio: gyro: adxrs450: Fix alignment for DMA safety
____cacheline_aligned is an insufficient guarantee for non-coherent DMA on platforms with 128 byte cachelines above L1. Switch to the updated IIO_DMA_MINALIGN definition. Fixes tag is inaccurate but unlikely anyone will be interested in backporting beyond that point. Fixes: 53ac8500ba9b ("staging:iio:adxrs450: Move header file contents to main file") Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Acked-by: Nuno Sá <nuno.sa@analog.com> Link: https://lore.kernel.org/r/20220508175712.647246-75-jic23@kernel.org
Diffstat (limited to 'drivers/iio/gyro')
-rw-r--r--drivers/iio/gyro/adxrs450.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/iio/gyro/adxrs450.c b/drivers/iio/gyro/adxrs450.c
index 04f350025215..f84438e0c42c 100644
--- a/drivers/iio/gyro/adxrs450.c
+++ b/drivers/iio/gyro/adxrs450.c
@@ -73,7 +73,7 @@ enum {
struct adxrs450_state {
struct spi_device *us;
struct mutex buf_lock;
- __be32 tx ____cacheline_aligned;
+ __be32 tx __aligned(IIO_DMA_MINALIGN);
__be32 rx;
};