diff options
| author | Gwendal Grignou <gwendal@chromium.org> | 2022-04-29 15:01:40 -0700 |
|---|---|---|
| committer | Jonathan Cameron <Jonathan.Cameron@huawei.com> | 2022-06-14 11:53:10 +0100 |
| commit | 841a329b5faa19a5096b38ea3c442d4db0a8f4f6 (patch) | |
| tree | 646d362a329a13ab42dd8aaece5efae04f33f4ce /drivers/iio/proximity | |
| parent | f337f41f5d00f41b976d39581eeb5520c88c5ce5 (diff) | |
iio: sx9324: Add Setting for internal compensation resistor
Based on device tree setting, set the internal compensation resistor.
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Link: https://lore.kernel.org/r/20220429220144.1476049-7-gwendal@chromium.org
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Diffstat (limited to 'drivers/iio/proximity')
| -rw-r--r-- | drivers/iio/proximity/sx9324.c | 21 |
1 files changed, 20 insertions, 1 deletions
diff --git a/drivers/iio/proximity/sx9324.c b/drivers/iio/proximity/sx9324.c index 28e26723aac9..926a0da5915c 100644 --- a/drivers/iio/proximity/sx9324.c +++ b/drivers/iio/proximity/sx9324.c @@ -52,6 +52,11 @@ #define SX9324_REG_CLK_SPRD 0x15 #define SX9324_REG_AFE_CTRL0 0x20 +#define SX9324_REG_AFE_CTRL0_RINT_SHIFT 6 +#define SX9324_REG_AFE_CTRL0_RINT_MASK \ + GENMASK(SX9324_REG_AFE_CTRL0_RINT_SHIFT + 1, \ + SX9324_REG_AFE_CTRL0_RINT_SHIFT) +#define SX9324_REG_AFE_CTRL0_RINT_LOWEST 0x00 #define SX9324_REG_AFE_CTRL1 0x21 #define SX9324_REG_AFE_CTRL2 0x22 #define SX9324_REG_AFE_CTRL3 0x23 @@ -783,7 +788,7 @@ static const struct sx_common_reg_default sx9324_default_regs[] = { */ { SX9324_REG_GNRL_CTRL1, SX9324_REG_GNRL_CTRL1_PAUSECTRL }, - { SX9324_REG_AFE_CTRL0, 0x00 }, + { SX9324_REG_AFE_CTRL0, SX9324_REG_AFE_CTRL0_RINT_LOWEST }, { SX9324_REG_AFE_CTRL3, 0x00 }, { SX9324_REG_AFE_CTRL4, SX9324_REG_AFE_CTRL4_FREQ_83_33HZ | SX9324_REG_AFE_CTRL4_RES_100 }, @@ -864,6 +869,8 @@ static const struct sx_common_reg_default * sx9324_get_default_reg(struct device *dev, int idx, struct sx_common_reg_default *reg_def) { + static const char * const sx9324_rints[] = { "lowest", "low", "high", + "highest" }; #define SX9324_PIN_DEF "semtech,ph0-pin" #define SX9324_RESOLUTION_DEF "semtech,ph01-resolution" #define SX9324_PROXRAW_DEF "semtech,ph01-proxraw-strength" @@ -871,6 +878,7 @@ sx9324_get_default_reg(struct device *dev, int idx, char prop[] = SX9324_PROXRAW_DEF; u32 start = 0, raw = 0, pos = 0; int ret, count, ph, pin; + const char *res; memcpy(reg_def, &sx9324_default_regs[idx], sizeof(*reg_def)); switch (reg_def->reg) { @@ -891,6 +899,17 @@ sx9324_get_default_reg(struct device *dev, int idx, SX9324_REG_AFE_PH0_PIN_MASK(pin); reg_def->def = raw; break; + case SX9324_REG_AFE_CTRL0: + ret = device_property_read_string(dev, + "semtech,int-comp-resistor", &res); + if (ret) + break; + ret = match_string(sx9324_rints, ARRAY_SIZE(sx9324_rints), res); + if (ret < 0) + break; + reg_def->def &= ~SX9324_REG_AFE_CTRL0_RINT_MASK; + reg_def->def |= ret << SX9324_REG_AFE_CTRL0_RINT_SHIFT; + break; case SX9324_REG_AFE_CTRL4: case SX9324_REG_AFE_CTRL7: if (reg_def->reg == SX9324_REG_AFE_CTRL4) |