diff options
| author | Marek Szyprowski <m.szyprowski@samsung.com> | 2017-03-24 10:18:44 +0100 |
|---|---|---|
| committer | Joerg Roedel <jroedel@suse.de> | 2017-03-24 12:11:43 +0100 |
| commit | e75276638c1423d286e425fd29375e5736c7635c (patch) | |
| tree | d007b4495261be5c5fb64389b79db20512d28ba4 /drivers/iommu/exynos-iommu.c | |
| parent | 97da3854c526d3a6ee05c849c96e48d21527606c (diff) | |
iommu/exynos: Don't open-code loop unrolling
IOMMU domain allocation is not performance critical operation, so remove
hand made optimisation of unrolled initialization loop and leave this to
the compiler.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Joerg Roedel <jroedel@suse.de>
Diffstat (limited to 'drivers/iommu/exynos-iommu.c')
| -rw-r--r-- | drivers/iommu/exynos-iommu.c | 12 |
1 files changed, 2 insertions, 10 deletions
diff --git a/drivers/iommu/exynos-iommu.c b/drivers/iommu/exynos-iommu.c index a7e0821c9967..b83df7196e76 100644 --- a/drivers/iommu/exynos-iommu.c +++ b/drivers/iommu/exynos-iommu.c @@ -741,16 +741,8 @@ static struct iommu_domain *exynos_iommu_domain_alloc(unsigned type) goto err_counter; /* Workaround for System MMU v3.3 to prevent caching 1MiB mapping */ - for (i = 0; i < NUM_LV1ENTRIES; i += 8) { - domain->pgtable[i + 0] = ZERO_LV2LINK; - domain->pgtable[i + 1] = ZERO_LV2LINK; - domain->pgtable[i + 2] = ZERO_LV2LINK; - domain->pgtable[i + 3] = ZERO_LV2LINK; - domain->pgtable[i + 4] = ZERO_LV2LINK; - domain->pgtable[i + 5] = ZERO_LV2LINK; - domain->pgtable[i + 6] = ZERO_LV2LINK; - domain->pgtable[i + 7] = ZERO_LV2LINK; - } + for (i = 0; i < NUM_LV1ENTRIES; i++) + domain->pgtable[i] = ZERO_LV2LINK; handle = dma_map_single(dma_dev, domain->pgtable, LV1TABLE_SIZE, DMA_TO_DEVICE); |