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authorThomas Gleixner <tglx@linutronix.de>2020-10-24 22:35:20 +0100
committerThomas Gleixner <tglx@linutronix.de>2020-10-28 20:26:27 +0100
commit341b4a7211b6ba3a7089e1dc09ac4bd576dfb05f (patch)
treeb426a1bb19d527d4ea4da146a4d38789507a2d65 /drivers/iommu/hyperv-iommu.c
parenta27dca645d2c0f31abb7858aa0e10b2fa0f2f659 (diff)
x86/ioapic: Cleanup IO/APIC route entry structs
Having two seperate structs for the I/O-APIC RTE entries (non-remapped and DMAR remapped) requires type casts and makes it hard to map. Combine them in IO_APIC_routing_entry by defining a union of two 64bit bitfields. Use naming which reflects which bits are shared and which bits are actually different for the operating modes. [dwmw2: Fix it up and finish the job, pulling the 32-bit w1,w2 words for register access into the same union and eliminating a few more places where bits were accessed through masks and shifts.] Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: David Woodhouse <dwmw@amazon.co.uk> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Link: https://lore.kernel.org/r/20201024213535.443185-21-dwmw2@infradead.org
Diffstat (limited to 'drivers/iommu/hyperv-iommu.c')
-rw-r--r--drivers/iommu/hyperv-iommu.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/iommu/hyperv-iommu.c b/drivers/iommu/hyperv-iommu.c
index e09e2d734c57..1ab7eb918a5c 100644
--- a/drivers/iommu/hyperv-iommu.c
+++ b/drivers/iommu/hyperv-iommu.c
@@ -52,7 +52,7 @@ static int hyperv_ir_set_affinity(struct irq_data *data,
return ret;
entry = data->chip_data;
- entry->dest = cfg->dest_apicid;
+ entry->destid_0_7 = cfg->dest_apicid;
entry->vector = cfg->vector;
send_cleanup_vector(cfg);
@@ -125,7 +125,7 @@ static int hyperv_irq_remapping_activate(struct irq_domain *domain,
struct irq_cfg *cfg = irqd_cfg(irq_data);
struct IO_APIC_route_entry *entry = irq_data->chip_data;
- entry->dest = cfg->dest_apicid;
+ entry->destid_0_7 = cfg->dest_apicid;
entry->vector = cfg->vector;
return 0;