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authorMark Brown <broonie@kernel.org>2022-09-15 10:29:01 +0100
committerMark Brown <broonie@kernel.org>2022-09-15 10:29:01 +0100
commit12e51866c79fe37faed276442f4b0dfd9f2dc174 (patch)
tree8c2c85171d6eb06fbc7c4d0e06ed8be97a3448cc /drivers/iommu/intel/iommu.h
parenta6b0be65123e1dfbcce6653a82394f989d3372ff (diff)
parentb2d7616e13c4eb766f5e2f6568c2e746e76b7b53 (diff)
ASoC/qcom/arm64: Qualcomm ADSP DTS and binding fixes
Merge series from Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>: Hi, Dependencies/merging ==================== 1. The DTS patches are independent. 2. The binding patches should come together, because of context changes. Could be one of: Qualcomm SoC, ASoC or DT tree. Changes since v3 ================ 1. Patch 9-10: re-order, so first apr.yaml is corrected and then we convert to DT schema. This makes patchset fully bisectable in expense of changing the same lines twice. 2. Patch 11: New patch. Changes since v2 ================ 1. Patch 9: rename and extend commit msg. 2. Add Rb tags. Changes since v1 ================ 1. Patch 9: New patch. 2. Patch 10: Correct also sound/qcom,q6apm-dai.yaml (Rob). 2. Patch 13: New patch. 3. Add Rb/Tb tags. Best regards, Krzysztof Krzysztof Kozlowski (15): arm64: dts: qcom: sdm630: align APR services node names with dtschema arm64: dts: qcom: sdm845: align APR services node names with dtschema arm64: dts: qcom: sm8250: align APR services node names with dtschema arm64: dts: qcom: msm8996: fix APR services nodes arm64: dts: qcom: sdm845: align dai node names with dtschema arm64: dts: qcom: msm8996: align dai node names with dtschema arm64: dts: qcom: qrb5165-rb5: align dai node names with dtschema arm64: dts: qcom: sm8250: use generic name for LPASS clock controller dt-bindings: soc: qcom: apr: correct service children ASoC: dt-bindings: qcom,q6asm: convert to dtschema ASoC: dt-bindings: qcom,q6adm: convert to dtschema ASoC: dt-bindings: qcom,q6dsp-lpass-ports: cleanup example ASoC: dt-bindings: qcom,q6dsp-lpass-clocks: cleanup example ASoC: dt-bindings: qcom,q6apm-dai: adjust indentation in example dt-bindings: soc: qcom: apr: add missing properties .../bindings/soc/qcom/qcom,apr.yaml | 112 ++++++++++++++++-- .../bindings/sound/qcom,q6adm-routing.yaml | 52 ++++++++ .../devicetree/bindings/sound/qcom,q6adm.txt | 39 ------ .../bindings/sound/qcom,q6apm-dai.yaml | 21 ++-- .../bindings/sound/qcom,q6asm-dais.yaml | 112 ++++++++++++++++++ .../devicetree/bindings/sound/qcom,q6asm.txt | 70 ----------- .../sound/qcom,q6dsp-lpass-clocks.yaml | 36 +++--- .../sound/qcom,q6dsp-lpass-ports.yaml | 64 +++++----- arch/arm64/boot/dts/qcom/msm8996.dtsi | 10 +- arch/arm64/boot/dts/qcom/qrb5165-rb5.dts | 4 +- arch/arm64/boot/dts/qcom/sdm630.dtsi | 8 +- arch/arm64/boot/dts/qcom/sdm845-db845c.dts | 2 +- .../boot/dts/qcom/sdm845-xiaomi-beryllium.dts | 2 +- .../boot/dts/qcom/sdm845-xiaomi-polaris.dts | 4 +- arch/arm64/boot/dts/qcom/sdm845.dtsi | 8 +- arch/arm64/boot/dts/qcom/sm8250.dtsi | 10 +- 16 files changed, 346 insertions(+), 208 deletions(-) create mode 100644 Documentation/devicetree/bindings/sound/qcom,q6adm-routing.yaml delete mode 100644 Documentation/devicetree/bindings/sound/qcom,q6adm.txt create mode 100644 Documentation/devicetree/bindings/sound/qcom,q6asm-dais.yaml delete mode 100644 Documentation/devicetree/bindings/sound/qcom,q6asm.txt -- 2.34.1
Diffstat (limited to 'drivers/iommu/intel/iommu.h')
-rw-r--r--drivers/iommu/intel/iommu.h9
1 files changed, 6 insertions, 3 deletions
diff --git a/drivers/iommu/intel/iommu.h b/drivers/iommu/intel/iommu.h
index fae45bbb0c7f..74b0e19e23ee 100644
--- a/drivers/iommu/intel/iommu.h
+++ b/drivers/iommu/intel/iommu.h
@@ -197,7 +197,6 @@
#define ecap_dis(e) (((e) >> 27) & 0x1)
#define ecap_nest(e) (((e) >> 26) & 0x1)
#define ecap_mts(e) (((e) >> 25) & 0x1)
-#define ecap_ecs(e) (((e) >> 24) & 0x1)
#define ecap_iotlb_offset(e) ((((e) >> 8) & 0x3ff) * 16)
#define ecap_max_iotlb_offset(e) (ecap_iotlb_offset(e) + 16)
#define ecap_coherent(e) ((e) & 0x1)
@@ -265,7 +264,6 @@
#define DMA_GSTS_CFIS (((u32)1) << 23)
/* DMA_RTADDR_REG */
-#define DMA_RTADDR_RTT (((u64)1) << 11)
#define DMA_RTADDR_SMT (((u64)1) << 10)
/* CCMD_REG */
@@ -579,6 +577,7 @@ struct intel_iommu {
#ifdef CONFIG_INTEL_IOMMU
unsigned long *domain_ids; /* bitmap of domains */
+ unsigned long *copied_tables; /* bitmap of copied tables */
spinlock_t lock; /* protect context, domain ids */
struct root_entry *root_entry; /* virtual address */
@@ -701,6 +700,11 @@ static inline int nr_pte_to_next_page(struct dma_pte *pte)
(struct dma_pte *)ALIGN((unsigned long)pte, VTD_PAGE_SIZE) - pte;
}
+static inline bool context_present(struct context_entry *context)
+{
+ return (context->lo & 1);
+}
+
extern struct dmar_drhd_unit * dmar_find_matched_drhd_unit(struct pci_dev *dev);
extern int dmar_enable_qi(struct intel_iommu *iommu);
@@ -784,7 +788,6 @@ static inline void intel_iommu_debugfs_init(void) {}
#endif /* CONFIG_INTEL_IOMMU_DEBUGFS */
extern const struct attribute_group *intel_iommu_groups[];
-bool context_present(struct context_entry *context);
struct context_entry *iommu_context_addr(struct intel_iommu *iommu, u8 bus,
u8 devfn, int alloc);