diff options
author | Jacob Pan <jacob.jun.pan@linux.intel.com> | 2021-03-02 02:13:58 -0800 |
---|---|---|
committer | Joerg Roedel <jroedel@suse.de> | 2021-03-18 11:42:46 +0100 |
commit | bb0f61533dfd6aa815a2719720c77d13f840b683 (patch) | |
tree | 2f4f9591d4551afb362fefa75bdf0b8d48a6cb66 /drivers/iommu/intel/pasid.c | |
parent | f68c7f539b6e9712e941212ab95a1feb5a0bf3b3 (diff) |
iommu/vt-d: Enable write protect propagation from guest
Write protect bit, when set, inhibits supervisor writes to the read-only
pages. In guest supervisor shared virtual addressing (SVA), write-protect
should be honored upon guest bind supervisor PASID request.
This patch extends the VT-d portion of the IOMMU UAPI to include WP bit.
WPE bit of the supervisor PASID entry will be set to match CPU CR0.WP bit.
Signed-off-by: Sanjay Kumar <sanjay.k.kumar@intel.com>
Signed-off-by: Jacob Pan <jacob.jun.pan@linux.intel.com>
Acked-by: Lu Baolu <baolu.lu@linux.intel.com>
Link: https://lore.kernel.org/r/1614680040-1989-3-git-send-email-jacob.jun.pan@linux.intel.com
Signed-off-by: Joerg Roedel <jroedel@suse.de>
Diffstat (limited to 'drivers/iommu/intel/pasid.c')
-rw-r--r-- | drivers/iommu/intel/pasid.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/iommu/intel/pasid.c b/drivers/iommu/intel/pasid.c index 629e3aee44fe..0bf7e0a76890 100644 --- a/drivers/iommu/intel/pasid.c +++ b/drivers/iommu/intel/pasid.c @@ -732,6 +732,9 @@ intel_pasid_setup_bind_data(struct intel_iommu *iommu, struct pasid_entry *pte, return -EINVAL; } pasid_set_sre(pte); + /* Enable write protect WP if guest requested */ + if (pasid_data->flags & IOMMU_SVA_VTD_GPASID_WPE) + pasid_set_wpe(pte); } if (pasid_data->flags & IOMMU_SVA_VTD_GPASID_EAFE) { |