diff options
| author | Yanfei Xu <yanfei.xu@intel.com> | 2023-08-09 20:48:04 +0800 |
|---|---|---|
| committer | Joerg Roedel <jroedel@suse.de> | 2023-08-09 17:46:19 +0200 |
| commit | 8a3b8e63f8371c1247b7aa24ff9c5312f1a6948b (patch) | |
| tree | 53610426ddfad059106e33392fbf7775cb35249b /drivers/iommu/intel | |
| parent | d3aedf94f480971f7ffe88d337ba72e6f7d32497 (diff) | |
iommu/vt-d: Fix to flush cache of PASID directory table
Even the PCI devices don't support pasid capability, PASID table is
mandatory for a PCI device in scalable mode. However flushing cache
of pasid directory table for these devices are not taken after pasid
table is allocated as the "size" of table is zero. Fix it by
calculating the size by page order.
Found this when reading the code, no real problem encountered for now.
Fixes: 194b3348bdbb ("iommu/vt-d: Fix PASID directory pointer coherency")
Suggested-by: Lu Baolu <baolu.lu@linux.intel.com>
Signed-off-by: Yanfei Xu <yanfei.xu@intel.com>
Link: https://lore.kernel.org/r/20230616081045.721873-1-yanfei.xu@intel.com
Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com>
Signed-off-by: Joerg Roedel <jroedel@suse.de>
Diffstat (limited to 'drivers/iommu/intel')
| -rw-r--r-- | drivers/iommu/intel/pasid.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/iommu/intel/pasid.c b/drivers/iommu/intel/pasid.c index 23dca3bc319d..8f92b92f3d2a 100644 --- a/drivers/iommu/intel/pasid.c +++ b/drivers/iommu/intel/pasid.c @@ -129,7 +129,7 @@ int intel_pasid_alloc_table(struct device *dev) info->pasid_table = pasid_table; if (!ecap_coherent(info->iommu->ecap)) - clflush_cache_range(pasid_table->table, size); + clflush_cache_range(pasid_table->table, (1 << order) * PAGE_SIZE); return 0; } |