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| author | Suravee Suthikulpanit <suravee.suthikulpanit@amd.com> | 2022-08-25 06:39:35 +0000 |
|---|---|---|
| committer | Joerg Roedel <jroedel@suse.de> | 2022-09-07 16:12:34 +0200 |
| commit | be1af02b277417be735d8513195e5ba1bc3c3a3d (patch) | |
| tree | db5c40d13bc8297329d8dd6d16f8bd3fffb5ad75 /drivers/iommu/io-pgtable-arm.c | |
| parent | 43312b710b11a085ec81eb7d1878f8858045ae2b (diff) | |
iommu/amd: Update sanity check when enable PRI/ATS for IOMMU v1 table
Currently, PPR/ATS can be enabled only if the domain is type
identity mapping. However, when allowing the IOMMU v2 page table
to be used for DMA-API, the check is no longer valid.
Update the sanity check to only apply for when using AMD_IOMMU_V1
page table mode.
Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
Signed-off-by: Vasant Hegde <vasant.hegde@amd.com>
Link: https://lore.kernel.org/r/20220825063939.8360-6-vasant.hegde@amd.com
Signed-off-by: Joerg Roedel <jroedel@suse.de>
Diffstat (limited to 'drivers/iommu/io-pgtable-arm.c')
0 files changed, 0 insertions, 0 deletions