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author | Robin Murphy <robin.murphy@arm.com> | 2019-09-30 15:11:00 +0100 |
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committer | Will Deacon <will@kernel.org> | 2019-10-01 12:16:46 +0100 |
commit | 52f325f4eb321ea2e8a0779f49a3866be58bc694 (patch) | |
tree | 0b4bae35ad2f95bf35ae43f5299a1d5055969479 /drivers/iommu/omap-iommu-debug.c | |
parent | 6db7bfb431220d78e34d2d0afdb7c12683323588 (diff) |
iommu/io-pgtable-arm: Correct Mali attributes
Whilst Midgard's MEMATTR follows a similar principle to the VMSA MAIR,
the actual attribute values differ, so although it currently appears to
work to some degree, we probably shouldn't be using our standard stage 1
MAIR for that. Instead, generate a reasonable MEMATTR with attribute
values borrowed from the kbase driver; at this point we'll be overriding
or ignoring pretty much all of the LPAE config, so just implement these
Mali details in a dedicated allocator instead of pretending to subclass
the standard VMSA format.
Fixes: d08d42de6432 ("iommu: io-pgtable: Add ARM Mali midgard MMU page table format")
Tested-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Steven Price <steven.price@arm.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Robin Murphy <robin.murphy@arm.com>
Signed-off-by: Will Deacon <will@kernel.org>
Diffstat (limited to 'drivers/iommu/omap-iommu-debug.c')
0 files changed, 0 insertions, 0 deletions