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authorRobin Murphy <robin.murphy@arm.com>2019-08-15 19:37:22 +0100
committerWill Deacon <will@kernel.org>2019-08-19 16:52:47 +0100
commita5b396ce5001a8b8c8594c7fa90b0df61d6b3272 (patch)
tree6edbca5b257900b1783d943e54a696b1e66672d0 /drivers/iommu/qcom_iommu.c
parent353b325047fdfd437dc2afaee89fc66de3657b7e (diff)
iommu/qcom: Mask TLBI addresses correctly
As with arm-smmu from whence this code was borrowed, the IOVAs passed in here happen to be at least page-aligned anyway, but still; oh dear. Signed-off-by: Robin Murphy <robin.murphy@arm.com> Signed-off-by: Will Deacon <will@kernel.org>
Diffstat (limited to 'drivers/iommu/qcom_iommu.c')
-rw-r--r--drivers/iommu/qcom_iommu.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/iommu/qcom_iommu.c b/drivers/iommu/qcom_iommu.c
index 34d0b9783b3e..bed948c3058a 100644
--- a/drivers/iommu/qcom_iommu.c
+++ b/drivers/iommu/qcom_iommu.c
@@ -155,7 +155,7 @@ static void qcom_iommu_tlb_inv_range_nosync(unsigned long iova, size_t size,
struct qcom_iommu_ctx *ctx = to_ctx(fwspec, fwspec->ids[i]);
size_t s = size;
- iova &= ~12UL;
+ iova = (iova >> 12) << 12;
iova |= ctx->asid;
do {
iommu_writel(ctx, reg, iova);