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authorYian Chen <yian.chen@intel.com>2022-03-01 10:01:59 +0800
committerJoerg Roedel <jroedel@suse.de>2022-03-04 16:46:31 +0100
commit97f2f2c5317f55ae3440733a090a96a251da222b (patch)
treef9af4bcfd06e54db41eaed1956f66d20a39fd44d /drivers/iommu/rockchip-iommu.c
parentb897a1b7ad3f239fa19ee40aec429e96f5162669 (diff)
iommu/vt-d: Enable ATS for the devices in SATC table
Starting from Intel VT-d v3.2, Intel platform BIOS can provide additional SATC table structure. SATC table includes a list of SoC integrated devices that support ATC (Address translation cache). Enabling ATC (via ATS capability) can be a functional requirement for SATC device operation or optional to enhance device performance/functionality. This is determined by the bit of ATC_REQUIRED in SATC table. When IOMMU is working in scalable mode, software chooses to always enable ATS for every device in SATC table because Intel SoC devices in SATC table are trusted to use ATS. On the other hand, if IOMMU is in legacy mode, ATS of SATC capable devices can work transparently to software and be automatically enabled by IOMMU hardware. As the result, there is no need for software to enable ATS on these devices. This also removes dmar_find_matched_atsr_unit() helper as it becomes dead code now. Signed-off-by: Yian Chen <yian.chen@intel.com> Link: https://lore.kernel.org/r/20220222185416.1722611-1-yian.chen@intel.com Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com> Link: https://lore.kernel.org/r/20220301020159.633356-13-baolu.lu@linux.intel.com Signed-off-by: Joerg Roedel <jroedel@suse.de>
Diffstat (limited to 'drivers/iommu/rockchip-iommu.c')
0 files changed, 0 insertions, 0 deletions