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authorGuo Ren <ren_guo@c-sky.com>2018-09-16 15:57:14 +0800
committerGuo Ren <ren_guo@c-sky.com>2018-10-26 00:54:30 +0800
commitedff1b4835b71e14538d3a48568fa513ee9f7931 (patch)
tree5fe48f0dd7a2f8cbc087f98368851c6a09d371d9 /drivers/irqchip/Makefile
parent3fe5d5bd2dd92124f2a773c19fbc117e023a2ce3 (diff)
irqchip: add C-SKY APB bus interrupt controller
The driver is for C-SKY APB bus interrupt controller. It's a simple interrupt controller which use pending reg to detect the irq and use enable/disable reg to mask/unmask interrupt sources. A lot of SOCs based on C-SKY CPU use the interrupt controller as root controller. Signed-off-by: Guo Ren <ren_guo@c-sky.com> Reviewed-by: Mark Rutland <mark.rutland@arm.com>
Diffstat (limited to 'drivers/irqchip/Makefile')
-rw-r--r--drivers/irqchip/Makefile1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/irqchip/Makefile b/drivers/irqchip/Makefile
index 6b739ea27f85..72eaf5353af2 100644
--- a/drivers/irqchip/Makefile
+++ b/drivers/irqchip/Makefile
@@ -88,4 +88,5 @@ obj-$(CONFIG_GOLDFISH_PIC) += irq-goldfish-pic.o
obj-$(CONFIG_NDS32) += irq-ativic32.o
obj-$(CONFIG_QCOM_PDC) += qcom-pdc.o
obj-$(CONFIG_CSKY_MPINTC) += irq-csky-mpintc.o
+obj-$(CONFIG_CSKY_APB_INTC) += irq-csky-apb-intc.o
obj-$(CONFIG_SIFIVE_PLIC) += irq-sifive-plic.o