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authorPaul Cercueil <paul@crapouillou.net>2020-08-19 20:06:02 +0200
committerMarc Zyngier <maz@kernel.org>2020-08-25 10:59:29 +0100
commit821fc9e261f3af235752f46e59084467cfd440c4 (patch)
treeeab534b1062608e36a7b54ccc7be693625f235b8 /drivers/irqchip
parente579076ac0a3bebb440fab101aef3c42c9f4c709 (diff)
irqchip/ingenic: Leave parent IRQ unmasked on suspend
All the wakeup sources we possibly want will go through the interrupt controller, so the parent IRQ must not be masked during suspend, or there won't be any way to wake up the system. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20200819180602.136969-1-paul@crapouillou.net
Diffstat (limited to 'drivers/irqchip')
-rw-r--r--drivers/irqchip/irq-ingenic.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/irqchip/irq-ingenic.c b/drivers/irqchip/irq-ingenic.c
index 9f3da4260ca6..b61a8901ef72 100644
--- a/drivers/irqchip/irq-ingenic.c
+++ b/drivers/irqchip/irq-ingenic.c
@@ -125,7 +125,7 @@ static int __init ingenic_intc_of_init(struct device_node *node,
irq_reg_writel(gc, IRQ_MSK(32), JZ_REG_INTC_SET_MASK);
}
- if (request_irq(parent_irq, intc_cascade, 0,
+ if (request_irq(parent_irq, intc_cascade, IRQF_NO_SUSPEND,
"SoC intc cascade interrupt", NULL))
pr_err("Failed to register SoC intc cascade interrupt\n");
return 0;