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authorLinus Torvalds <torvalds@linux-foundation.org>2022-12-14 15:23:49 -0800
committerLinus Torvalds <torvalds@linux-foundation.org>2022-12-14 15:23:49 -0800
commiteb67d239f3aa1711afb0a42eab50459d9f3d672e (patch)
tree4c762c7836cb8c5dbd3d4372b091e1659bcf6396 /drivers/irqchip
parent94a855111ed9106971ca2617c5d075269e6aefde (diff)
parent6e66e96e31b81fb08075d18a3e2c201f1e2171da (diff)
Merge tag 'riscv-for-linus-6.2-mw1' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux
Pull RISC-V updates from Palmer Dabbelt: - Support for the T-Head PMU via the perf subsystem - ftrace support for rv32 - Support for non-volatile memory devices - Various fixes and cleanups * tag 'riscv-for-linus-6.2-mw1' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux: (52 commits) Documentation: RISC-V: patch-acceptance: s/implementor/implementer Documentation: RISC-V: Mention the UEFI Standards Documentation: RISC-V: Allow patches for non-standard behavior Documentation: RISC-V: Fix a typo in patch-acceptance riscv: Fixup compile error with !MMU riscv: Fix P4D_SHIFT definition for 3-level page table mode riscv: Apply a static assert to riscv_isa_ext_id RISC-V: Add some comments about the shadow and overflow stacks RISC-V: Align the shadow stack RISC-V: Ensure Zicbom has a valid block size RISC-V: Introduce riscv_isa_extension_check RISC-V: Improve use of isa2hwcap[] riscv: Don't duplicate _ALTERNATIVE_CFG* macros riscv: alternatives: Drop the underscores from the assembly macro names riscv: alternatives: Don't name unused macro parameters riscv: Don't duplicate __ALTERNATIVE_CFG in __ALTERNATIVE_CFG_2 riscv: mm: call best_map_size many times during linear-mapping riscv: Move cast inside kernel_mapping_[pv]a_to_[vp]a riscv: Fix crash during early errata patching riscv: boot: add zstd support ...
Diffstat (limited to 'drivers/irqchip')
-rw-r--r--drivers/irqchip/Kconfig21
1 files changed, 2 insertions, 19 deletions
diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig
index d07568a2c539..caa952c40ff9 100644
--- a/drivers/irqchip/Kconfig
+++ b/drivers/irqchip/Kconfig
@@ -538,31 +538,14 @@ config TI_PRUSS_INTC
different processors within the SoC.
config RISCV_INTC
- bool "RISC-V Local Interrupt Controller"
+ bool
depends on RISCV
- default y
- help
- This enables support for the per-HART local interrupt controller
- found in standard RISC-V systems. The per-HART local interrupt
- controller handles timer interrupts, software interrupts, and
- hardware interrupts. Without a per-HART local interrupt controller,
- a RISC-V system will be unable to handle any interrupts.
-
- If you don't know what to do here, say Y.
config SIFIVE_PLIC
- bool "SiFive Platform-Level Interrupt Controller"
+ bool
depends on RISCV
select IRQ_DOMAIN_HIERARCHY
select GENERIC_IRQ_EFFECTIVE_AFF_MASK if SMP
- help
- This enables support for the PLIC chip found in SiFive (and
- potentially other) RISC-V systems. The PLIC controls devices
- interrupts and connects them to each core's local interrupt
- controller. Aside from timer and software interrupts, all other
- interrupt sources are subordinate to the PLIC.
-
- If you don't know what to do here, say Y.
config EXYNOS_IRQ_COMBINER
bool "Samsung Exynos IRQ combiner support" if COMPILE_TEST