diff options
| author | Tom Saeger <tom.saeger@oracle.com> | 2021-03-12 19:31:10 -0700 |
|---|---|---|
| committer | Jassi Brar <jaswinder.singh@linaro.org> | 2021-04-13 20:07:35 -0500 |
| commit | 9d2e8b93236a45f20ae0b71cc507301111cc2f58 (patch) | |
| tree | 6e24bf016583bd52b0d50f23a317b04a996712b6 /drivers/mailbox/sprd-mailbox.c | |
| parent | 3cfc7489667bcd2ab4eb1638ec7bc8b67c6324d0 (diff) | |
mailbox: fix various typos in comments
Fix trivial typos in mailbox driver comments.
s/Intergrated/Integrated/
s/extenstion/extension/
s/atleast/at least/
s/commnunication/communication/
s/assgined/assigned/
s/commnunication/communication/
s/recevied/received/
s/succeded/succeeded/
s/implmentation/implementation/
s/definiation/definition/
s/traget/target/
s/wont/won't/
Cc: trivial@kernel.org
Signed-off-by: Tom Saeger <tom.saeger@oracle.com>
Reviewed-by: Randy Dunlap <rdunlap@infradead.org>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
Diffstat (limited to 'drivers/mailbox/sprd-mailbox.c')
| -rw-r--r-- | drivers/mailbox/sprd-mailbox.c | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/drivers/mailbox/sprd-mailbox.c b/drivers/mailbox/sprd-mailbox.c index 4c325301a2fe..56b34a67ff1a 100644 --- a/drivers/mailbox/sprd-mailbox.c +++ b/drivers/mailbox/sprd-mailbox.c @@ -25,28 +25,28 @@ #define SPRD_MBOX_LOCK 0x20 #define SPRD_MBOX_FIFO_DEPTH 0x24 -/* Bit and mask definiation for inbox's SPRD_MBOX_FIFO_STS register */ +/* Bit and mask definition for inbox's SPRD_MBOX_FIFO_STS register */ #define SPRD_INBOX_FIFO_DELIVER_MASK GENMASK(23, 16) #define SPRD_INBOX_FIFO_OVERLOW_MASK GENMASK(15, 8) #define SPRD_INBOX_FIFO_DELIVER_SHIFT 16 #define SPRD_INBOX_FIFO_BUSY_MASK GENMASK(7, 0) -/* Bit and mask definiation for SPRD_MBOX_IRQ_STS register */ +/* Bit and mask definition for SPRD_MBOX_IRQ_STS register */ #define SPRD_MBOX_IRQ_CLR BIT(0) -/* Bit and mask definiation for outbox's SPRD_MBOX_FIFO_STS register */ +/* Bit and mask definition for outbox's SPRD_MBOX_FIFO_STS register */ #define SPRD_OUTBOX_FIFO_FULL BIT(2) #define SPRD_OUTBOX_FIFO_WR_SHIFT 16 #define SPRD_OUTBOX_FIFO_RD_SHIFT 24 #define SPRD_OUTBOX_FIFO_POS_MASK GENMASK(7, 0) -/* Bit and mask definiation for inbox's SPRD_MBOX_IRQ_MSK register */ +/* Bit and mask definition for inbox's SPRD_MBOX_IRQ_MSK register */ #define SPRD_INBOX_FIFO_BLOCK_IRQ BIT(0) #define SPRD_INBOX_FIFO_OVERFLOW_IRQ BIT(1) #define SPRD_INBOX_FIFO_DELIVER_IRQ BIT(2) #define SPRD_INBOX_FIFO_IRQ_MASK GENMASK(2, 0) -/* Bit and mask definiation for outbox's SPRD_MBOX_IRQ_MSK register */ +/* Bit and mask definition for outbox's SPRD_MBOX_IRQ_MSK register */ #define SPRD_OUTBOX_FIFO_NOT_EMPTY_IRQ BIT(0) #define SPRD_OUTBOX_FIFO_IRQ_MASK GENMASK(4, 0) @@ -150,7 +150,7 @@ static irqreturn_t sprd_mbox_inbox_isr(int irq, void *data) chan = &priv->chan[id]; /* - * Check if the message was fetched by remote traget, if yes, + * Check if the message was fetched by remote target, if yes, * that means the transmission has been completed. */ busy = fifo_sts & SPRD_INBOX_FIFO_BUSY_MASK; |