diff options
| author | Kiran AVND <avnd.kiran@samsung.com> | 2014-10-21 08:06:59 -0300 |
|---|---|---|
| committer | Mauro Carvalho Chehab <mchehab@osg.samsung.com> | 2014-10-28 15:44:06 -0200 |
| commit | d7dce6a3cdcfa95703c551a921068223df46732a (patch) | |
| tree | d31c5f3d997d393c3ddfc21bf67119f88fe6e7be /drivers/media/platform/s5p-mfc/s5p_mfc_ctrl.c | |
| parent | bb21c54af7c6d7896f218cc8e4e5d4a466b8e137 (diff) | |
[media] s5p-mfc: keep RISC ON during reset for V7/V8
Reset sequence for MFC V7 and V8 do not need RISC_ON
to be set to 0, while for MFC V6 it is still needed.
Also, remove a couple of register settings during Reset
which are not needed from V6 onwards.
Signed-off-by: Kiran AVND <avnd.kiran@samsung.com>
Signed-off-by: Arun Kumar K <arun.kk@samsung.com>
Signed-off-by: Kamil Debski <k.debski@samsung.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
Diffstat (limited to 'drivers/media/platform/s5p-mfc/s5p_mfc_ctrl.c')
| -rw-r--r-- | drivers/media/platform/s5p-mfc/s5p_mfc_ctrl.c | 25 |
1 files changed, 15 insertions, 10 deletions
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_ctrl.c b/drivers/media/platform/s5p-mfc/s5p_mfc_ctrl.c index 0c885a8a0e9f..f5bb6b2b3a5f 100644 --- a/drivers/media/platform/s5p-mfc/s5p_mfc_ctrl.c +++ b/drivers/media/platform/s5p-mfc/s5p_mfc_ctrl.c @@ -139,12 +139,6 @@ int s5p_mfc_reset(struct s5p_mfc_dev *dev) mfc_debug_enter(); if (IS_MFCV6_PLUS(dev)) { - /* Reset IP */ - /* except RISC, reset */ - mfc_write(dev, 0xFEE, S5P_FIMV_MFC_RESET_V6); - /* reset release */ - mfc_write(dev, 0x0, S5P_FIMV_MFC_RESET_V6); - /* Zero Initialization of MFC registers */ mfc_write(dev, 0, S5P_FIMV_RISC2HOST_CMD_V6); mfc_write(dev, 0, S5P_FIMV_HOST2RISC_CMD_V6); @@ -153,8 +147,13 @@ int s5p_mfc_reset(struct s5p_mfc_dev *dev) for (i = 0; i < S5P_FIMV_REG_CLEAR_COUNT_V6; i++) mfc_write(dev, 0, S5P_FIMV_REG_CLEAR_BEGIN_V6 + (i*4)); - /* Reset */ - mfc_write(dev, 0, S5P_FIMV_RISC_ON_V6); + /* Reset + * set RISC_ON to 0 during power_on & wake_up. + * V6 needs RISC_ON set to 0 during reset also. + */ + if ((!dev->risc_on) || (!IS_MFCV7(dev))) + mfc_write(dev, 0, S5P_FIMV_RISC_ON_V6); + mfc_write(dev, 0x1FFF, S5P_FIMV_MFC_RESET_V6); mfc_write(dev, 0, S5P_FIMV_MFC_RESET_V6); } else { @@ -226,6 +225,7 @@ int s5p_mfc_init_hw(struct s5p_mfc_dev *dev) /* 0. MFC reset */ mfc_debug(2, "MFC reset..\n"); s5p_mfc_clock_on(); + dev->risc_on = 0; ret = s5p_mfc_reset(dev); if (ret) { mfc_err("Failed to reset MFC - timeout\n"); @@ -238,8 +238,10 @@ int s5p_mfc_init_hw(struct s5p_mfc_dev *dev) s5p_mfc_clear_cmds(dev); /* 3. Release reset signal to the RISC */ s5p_mfc_clean_dev_int_flags(dev); - if (IS_MFCV6_PLUS(dev)) + if (IS_MFCV6_PLUS(dev)) { + dev->risc_on = 1; mfc_write(dev, 0x1, S5P_FIMV_RISC_ON_V6); + } else mfc_write(dev, 0x3ff, S5P_FIMV_SW_RESET); mfc_debug(2, "Will now wait for completion of firmware transfer\n"); @@ -336,6 +338,7 @@ int s5p_mfc_wakeup(struct s5p_mfc_dev *dev) /* 0. MFC reset */ mfc_debug(2, "MFC reset..\n"); s5p_mfc_clock_on(); + dev->risc_on = 0; ret = s5p_mfc_reset(dev); if (ret) { mfc_err("Failed to reset MFC - timeout\n"); @@ -354,8 +357,10 @@ int s5p_mfc_wakeup(struct s5p_mfc_dev *dev) return ret; } /* 4. Release reset signal to the RISC */ - if (IS_MFCV6_PLUS(dev)) + if (IS_MFCV6_PLUS(dev)) { + dev->risc_on = 1; mfc_write(dev, 0x1, S5P_FIMV_RISC_ON_V6); + } else mfc_write(dev, 0x3ff, S5P_FIMV_SW_RESET); mfc_debug(2, "Ok, now will write a command to wakeup the system\n"); |