diff options
| author | Mauro Carvalho Chehab <mchehab@redhat.com> | 2013-04-10 15:54:46 -0300 |
|---|---|---|
| committer | Mauro Carvalho Chehab <mchehab@redhat.com> | 2013-04-16 21:32:27 -0300 |
| commit | d75d538899da00bdf8f152c65a99eda1ab59daa3 (patch) | |
| tree | ac90e2118786afbc380968f56c22f0b2cd27af58 /drivers/media/tuners/r820t.h | |
| parent | 9cc2570a1dd74c22b4644b325257cf92d4cdb031 (diff) | |
[media] r820t: proper initialize the PLL register
The rtl-sdr library, from where this driver was initially
based, doesn't use half PLL clock, but this is used on
the Realtek Kernel driver. So, also do the same here.
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
Tested-by: Antti Palosaari <crope@iki.fi>
Diffstat (limited to 'drivers/media/tuners/r820t.h')
| -rw-r--r-- | drivers/media/tuners/r820t.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/media/tuners/r820t.h b/drivers/media/tuners/r820t.h index 949575a41d49..4c0823b21693 100644 --- a/drivers/media/tuners/r820t.h +++ b/drivers/media/tuners/r820t.h @@ -26,6 +26,9 @@ enum r820t_chip { CHIP_R820T, + CHIP_R620D, + CHIP_R828D, + CHIP_R828, CHIP_R828S, CHIP_R820C, }; |