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authorDaniel Scheller <d.scheller@gmx.net>2017-04-09 16:38:22 -0300
committerMauro Carvalho Chehab <mchehab@s-opensource.com>2017-06-20 09:55:41 -0300
commit14fd86290df1d2505556fddd895470860182dc22 (patch)
tree8d7499fa73a7d37e9961e4e52b60a3fba3ebde95 /drivers/media
parente3943aa6d8023bbd0ce972367b8c9eb1b43321e0 (diff)
[media] dvb-frontends/cxd2841er: configurable IFAGCNEG
Adds a flag to enable or disable the IFAGCNEG bit in cxd2841er_init_tc(). Signed-off-by: Daniel Scheller <d.scheller@gmx.net> Acked-by: Abylay Ospan <aospan@netup.ru> Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
Diffstat (limited to 'drivers/media')
-rw-r--r--drivers/media/dvb-frontends/cxd2841er.c5
-rw-r--r--drivers/media/dvb-frontends/cxd2841er.h1
2 files changed, 4 insertions, 2 deletions
diff --git a/drivers/media/dvb-frontends/cxd2841er.c b/drivers/media/dvb-frontends/cxd2841er.c
index 0522ceb676c5..1f577ebe25c6 100644
--- a/drivers/media/dvb-frontends/cxd2841er.c
+++ b/drivers/media/dvb-frontends/cxd2841er.c
@@ -3783,9 +3783,10 @@ static int cxd2841er_init_tc(struct dvb_frontend *fe)
dev_dbg(&priv->i2c->dev, "%s() bandwidth_hz=%d\n",
__func__, p->bandwidth_hz);
cxd2841er_shutdown_to_sleep_tc(priv);
- /* SONY_DEMOD_CONFIG_IFAGCNEG = 1 */
+ /* SONY_DEMOD_CONFIG_IFAGCNEG = 1 (0 for NO_AGCNEG */
cxd2841er_write_reg(priv, I2C_SLVT, 0x00, 0x10);
- cxd2841er_set_reg_bits(priv, I2C_SLVT, 0xcb, 0x40, 0x40);
+ cxd2841er_set_reg_bits(priv, I2C_SLVT, 0xcb,
+ ((priv->flags & CXD2841ER_NO_AGCNEG) ? 0x00 : 0x40), 0x40);
/* SONY_DEMOD_CONFIG_IFAGC_ADC_FS = 0 */
cxd2841er_write_reg(priv, I2C_SLVT, 0xcd, 0x50);
/* SONY_DEMOD_CONFIG_PARALLEL_SEL = 1 */
diff --git a/drivers/media/dvb-frontends/cxd2841er.h b/drivers/media/dvb-frontends/cxd2841er.h
index d77b59f5a839..4f944221c7fe 100644
--- a/drivers/media/dvb-frontends/cxd2841er.h
+++ b/drivers/media/dvb-frontends/cxd2841er.h
@@ -30,6 +30,7 @@
#define CXD2841ER_ASCOT 8 /* bit 3 */
#define CXD2841ER_EARLY_TUNE 16 /* bit 4 */
#define CXD2841ER_NO_WAIT_LOCK 32 /* bit 5 */
+#define CXD2841ER_NO_AGCNEG 64 /* bit 6 */
enum cxd2841er_xtal {
SONY_XTAL_20500, /* 20.5 MHz */