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authorJoseph Lo <josephl@nvidia.com>2019-05-29 16:21:37 +0800
committerThierry Reding <treding@nvidia.com>2020-06-22 13:54:57 +0200
commit9b9d8632f51f3609dfdfe8efc3c1e4e773c6c385 (patch)
treecce76f8a926775b378c388b6ad5dc1ac87cdd1cf /drivers/memory/tegra/Makefile
parent10de21148f7d28c9e918aaee7cede74a7d506e24 (diff)
memory: tegra: Add EMC scaling sequence code for Tegra210
This patch includes the sequence for clock tuning and the dynamic training mechanism for the clock above 800MHz. And historically there have been different sequences to change the EMC clock. The sequence to be used is specified in the EMC table. However, for the currently supported upstreaming platform, only the most recent sequence is used. So only support that in this patch. Based on the work of Peter De Schrijver <pdeschrijver@nvidia.com>. Signed-off-by: Joseph Lo <josephl@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'drivers/memory/tegra/Makefile')
-rw-r--r--drivers/memory/tegra/Makefile2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/memory/tegra/Makefile b/drivers/memory/tegra/Makefile
index ad9406c0829b..6c1a2ecc6628 100644
--- a/drivers/memory/tegra/Makefile
+++ b/drivers/memory/tegra/Makefile
@@ -18,4 +18,4 @@ obj-$(CONFIG_TEGRA210_EMC) += tegra210-emc.o
obj-$(CONFIG_ARCH_TEGRA_186_SOC) += tegra186.o tegra186-emc.o
obj-$(CONFIG_ARCH_TEGRA_194_SOC) += tegra186.o tegra186-emc.o
-tegra210-emc-y := tegra210-emc-core.o
+tegra210-emc-y := tegra210-emc-core.o tegra210-emc-cc-r21021.o