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authorLinus Torvalds <torvalds@linux-foundation.org>2017-02-23 15:57:04 -0800
committerLinus Torvalds <torvalds@linux-foundation.org>2017-02-23 15:57:04 -0800
commitb2e3c4319d40c9055c3c587cdb82ba69b50e919d (patch)
tree223bc161e96a5d39752dc056fed8d412c291e72a /drivers/memory
parentc61c15e08abb4365f100e411604b57a03ee5ae90 (diff)
parentdb27dd05b1da6e658494a2570680f8d0ddbc578c (diff)
Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC driver updates from Arnd Bergmann: "Driver updates for ARM SoCs. A handful of driver changes this time around. The larger changes are: - Reset drivers for hi3660 and zx2967 - AHCI driver for Davinci, acked by Tejun and brought in here due to platform dependencies - Cleanups of atmel-ebi (External Bus Interface) - Tweaks for Rockchip GRF (General Register File) usage (kitchensink misc register range on the SoCs) - PM domains changes for support of two new ZTE SoCs (zx296718 and zx2967)" * tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (53 commits) soc: samsung: pmu: Add register defines for pad retention control reset: make zx2967 explicitly non-modular reset: core: fix reset_control_put soc: samsung: pm_domains: Read domain name from the new label property soc: samsung: pm_domains: Remove message about failed memory allocation soc: samsung: pm_domains: Remove unused name field soc: samsung: pm_domains: Use full names in subdomains registration log sata: ahci-da850: un-hardcode the MPY bits sata: ahci-da850: add a workaround for controller instability sata: ahci: export ahci_do_hardreset() locally sata: ahci-da850: implement a workaround for the softreset quirk sata: ahci-da850: add device tree match table sata: ahci-da850: get the sata clock using a connection id soc: samsung: pmu: Remove duplicated define for ARM_L2_OPTION register memory: atmel-ebi: Enable the SMC clock if specified soc: samsung: pmu: Remove unused and duplicated defines memory: atmel-ebi: Properly handle multiple reference to the same CS memory: atmel-ebi: Fix the test to enable generic SMC logic soc: samsung: pm_domains: Add new Exynos5433 compatible soc: samsung: pmu: Add dummy support for Exynos5433 SoC ...
Diffstat (limited to 'drivers/memory')
-rw-r--r--drivers/memory/atmel-ebi.c126
-rw-r--r--drivers/memory/tegra/tegra124-emc.c5
2 files changed, 80 insertions, 51 deletions
diff --git a/drivers/memory/atmel-ebi.c b/drivers/memory/atmel-ebi.c
index 047d6fcdcec2..4e83a8b92665 100644
--- a/drivers/memory/atmel-ebi.c
+++ b/drivers/memory/atmel-ebi.c
@@ -76,9 +76,11 @@ struct at91_ebi_caps {
struct at91_ebi {
struct clk *clk;
- struct regmap *smc;
struct regmap *matrix;
-
+ struct {
+ struct regmap *regmap;
+ struct clk *clk;
+ } smc;
struct regmap_field *ebi_csa;
struct device *dev;
@@ -93,7 +95,7 @@ static void at91sam9_ebi_get_config(struct at91_ebi_dev *ebid,
struct at91_ebi_dev_config *conf)
{
struct at91sam9_smc_generic_fields *fields = &ebid->ebi->sam9;
- unsigned int clk_rate = clk_get_rate(ebid->ebi->clk);
+ unsigned int clk_period = NSEC_PER_SEC / clk_get_rate(ebid->ebi->clk);
struct at91sam9_ebi_dev_config *config = &conf->sam9;
struct at91sam9_smc_timings *timings = &config->timings;
unsigned int val;
@@ -102,43 +104,43 @@ static void at91sam9_ebi_get_config(struct at91_ebi_dev *ebid,
config->mode = val & ~AT91_SMC_TDF;
val = (val & AT91_SMC_TDF) >> 16;
- timings->tdf_ns = clk_rate * val;
+ timings->tdf_ns = clk_period * val;
regmap_fields_read(fields->setup, conf->cs, &val);
timings->ncs_rd_setup_ns = (val >> 24) & 0x1f;
timings->ncs_rd_setup_ns += ((val >> 29) & 0x1) * 128;
- timings->ncs_rd_setup_ns *= clk_rate;
+ timings->ncs_rd_setup_ns *= clk_period;
timings->nrd_setup_ns = (val >> 16) & 0x1f;
timings->nrd_setup_ns += ((val >> 21) & 0x1) * 128;
- timings->nrd_setup_ns *= clk_rate;
+ timings->nrd_setup_ns *= clk_period;
timings->ncs_wr_setup_ns = (val >> 8) & 0x1f;
timings->ncs_wr_setup_ns += ((val >> 13) & 0x1) * 128;
- timings->ncs_wr_setup_ns *= clk_rate;
+ timings->ncs_wr_setup_ns *= clk_period;
timings->nwe_setup_ns = val & 0x1f;
timings->nwe_setup_ns += ((val >> 5) & 0x1) * 128;
- timings->nwe_setup_ns *= clk_rate;
+ timings->nwe_setup_ns *= clk_period;
regmap_fields_read(fields->pulse, conf->cs, &val);
timings->ncs_rd_pulse_ns = (val >> 24) & 0x3f;
timings->ncs_rd_pulse_ns += ((val >> 30) & 0x1) * 256;
- timings->ncs_rd_pulse_ns *= clk_rate;
+ timings->ncs_rd_pulse_ns *= clk_period;
timings->nrd_pulse_ns = (val >> 16) & 0x3f;
timings->nrd_pulse_ns += ((val >> 22) & 0x1) * 256;
- timings->nrd_pulse_ns *= clk_rate;
+ timings->nrd_pulse_ns *= clk_period;
timings->ncs_wr_pulse_ns = (val >> 8) & 0x3f;
timings->ncs_wr_pulse_ns += ((val >> 14) & 0x1) * 256;
- timings->ncs_wr_pulse_ns *= clk_rate;
+ timings->ncs_wr_pulse_ns *= clk_period;
timings->nwe_pulse_ns = val & 0x3f;
timings->nwe_pulse_ns += ((val >> 6) & 0x1) * 256;
- timings->nwe_pulse_ns *= clk_rate;
+ timings->nwe_pulse_ns *= clk_period;
regmap_fields_read(fields->cycle, conf->cs, &val);
timings->nrd_cycle_ns = (val >> 16) & 0x7f;
timings->nrd_cycle_ns += ((val >> 23) & 0x3) * 256;
- timings->nrd_cycle_ns *= clk_rate;
+ timings->nrd_cycle_ns *= clk_period;
timings->nwe_cycle_ns = val & 0x7f;
timings->nwe_cycle_ns += ((val >> 7) & 0x3) * 256;
- timings->nwe_cycle_ns *= clk_rate;
+ timings->nwe_cycle_ns *= clk_period;
}
static int at91_xlate_timing(struct device_node *np, const char *prop,
@@ -334,6 +336,7 @@ static int at91sam9_ebi_apply_config(struct at91_ebi_dev *ebid,
struct at91_ebi_dev_config *conf)
{
unsigned int clk_rate = clk_get_rate(ebid->ebi->clk);
+ unsigned int clk_period = NSEC_PER_SEC / clk_rate;
struct at91sam9_ebi_dev_config *config = &conf->sam9;
struct at91sam9_smc_timings *timings = &config->timings;
struct at91sam9_smc_generic_fields *fields = &ebid->ebi->sam9;
@@ -376,7 +379,7 @@ static int at91sam9_ebi_apply_config(struct at91_ebi_dev *ebid,
val |= AT91SAM9_SMC_NWECYCLE(coded_val);
regmap_fields_write(fields->cycle, conf->cs, val);
- val = DIV_ROUND_UP(timings->tdf_ns, clk_rate);
+ val = DIV_ROUND_UP(timings->tdf_ns, clk_period);
if (val > AT91_SMC_TDF_MAX)
val = AT91_SMC_TDF_MAX;
regmap_fields_write(fields->mode, conf->cs,
@@ -394,22 +397,26 @@ static int at91sam9_ebi_init(struct at91_ebi *ebi)
field.id_offset = AT91SAM9_SMC_GENERIC_BLK_SZ;
field.reg = AT91SAM9_SMC_SETUP(AT91SAM9_SMC_GENERIC);
- fields->setup = devm_regmap_field_alloc(ebi->dev, ebi->smc, field);
+ fields->setup = devm_regmap_field_alloc(ebi->dev, ebi->smc.regmap,
+ field);
if (IS_ERR(fields->setup))
return PTR_ERR(fields->setup);
field.reg = AT91SAM9_SMC_PULSE(AT91SAM9_SMC_GENERIC);
- fields->pulse = devm_regmap_field_alloc(ebi->dev, ebi->smc, field);
+ fields->pulse = devm_regmap_field_alloc(ebi->dev, ebi->smc.regmap,
+ field);
if (IS_ERR(fields->pulse))
return PTR_ERR(fields->pulse);
field.reg = AT91SAM9_SMC_CYCLE(AT91SAM9_SMC_GENERIC);
- fields->cycle = devm_regmap_field_alloc(ebi->dev, ebi->smc, field);
+ fields->cycle = devm_regmap_field_alloc(ebi->dev, ebi->smc.regmap,
+ field);
if (IS_ERR(fields->cycle))
return PTR_ERR(fields->cycle);
field.reg = AT91SAM9_SMC_MODE(AT91SAM9_SMC_GENERIC);
- fields->mode = devm_regmap_field_alloc(ebi->dev, ebi->smc, field);
+ fields->mode = devm_regmap_field_alloc(ebi->dev, ebi->smc.regmap,
+ field);
return PTR_ERR_OR_ZERO(fields->mode);
}
@@ -422,22 +429,26 @@ static int sama5d3_ebi_init(struct at91_ebi *ebi)
field.id_offset = SAMA5_SMC_GENERIC_BLK_SZ;
field.reg = AT91SAM9_SMC_SETUP(SAMA5_SMC_GENERIC);
- fields->setup = devm_regmap_field_alloc(ebi->dev, ebi->smc, field);
+ fields->setup = devm_regmap_field_alloc(ebi->dev, ebi->smc.regmap,
+ field);
if (IS_ERR(fields->setup))
return PTR_ERR(fields->setup);
field.reg = AT91SAM9_SMC_PULSE(SAMA5_SMC_GENERIC);
- fields->pulse = devm_regmap_field_alloc(ebi->dev, ebi->smc, field);
+ fields->pulse = devm_regmap_field_alloc(ebi->dev, ebi->smc.regmap,
+ field);
if (IS_ERR(fields->pulse))
return PTR_ERR(fields->pulse);
field.reg = AT91SAM9_SMC_CYCLE(SAMA5_SMC_GENERIC);
- fields->cycle = devm_regmap_field_alloc(ebi->dev, ebi->smc, field);
+ fields->cycle = devm_regmap_field_alloc(ebi->dev, ebi->smc.regmap,
+ field);
if (IS_ERR(fields->cycle))
return PTR_ERR(fields->cycle);
field.reg = SAMA5_SMC_MODE(SAMA5_SMC_GENERIC);
- fields->mode = devm_regmap_field_alloc(ebi->dev, ebi->smc, field);
+ fields->mode = devm_regmap_field_alloc(ebi->dev, ebi->smc.regmap,
+ field);
return PTR_ERR_OR_ZERO(fields->mode);
}
@@ -448,12 +459,31 @@ static int at91_ebi_dev_setup(struct at91_ebi *ebi, struct device_node *np,
struct at91_ebi_dev_config conf = { };
struct device *dev = ebi->dev;
struct at91_ebi_dev *ebid;
- int ret, numcs = 0, i;
+ unsigned long cslines = 0;
+ int ret, numcs = 0, nentries, i;
bool apply = false;
+ u32 cs;
- numcs = of_property_count_elems_of_size(np, "reg",
- reg_cells * sizeof(u32));
- if (numcs <= 0) {
+ nentries = of_property_count_elems_of_size(np, "reg",
+ reg_cells * sizeof(u32));
+ for (i = 0; i < nentries; i++) {
+ ret = of_property_read_u32_index(np, "reg", i * reg_cells,
+ &cs);
+ if (ret)
+ return ret;
+
+ if (cs >= AT91_MATRIX_EBI_NUM_CS ||
+ !(ebi->caps->available_cs & BIT(cs))) {
+ dev_err(dev, "invalid reg property in %s\n",
+ np->full_name);
+ return -EINVAL;
+ }
+
+ if (!test_and_set_bit(cs, &cslines))
+ numcs++;
+ }
+
+ if (!numcs) {
dev_err(dev, "invalid reg property in %s\n", np->full_name);
return -EINVAL;
}
@@ -472,21 +502,8 @@ static int at91_ebi_dev_setup(struct at91_ebi *ebi, struct device_node *np,
else if (ret)
apply = true;
- for (i = 0; i < numcs; i++) {
- u32 cs;
-
- ret = of_property_read_u32_index(np, "reg", i * reg_cells,
- &cs);
- if (ret)
- return ret;
-
- if (cs > AT91_MATRIX_EBI_NUM_CS ||
- !(ebi->caps->available_cs & BIT(cs))) {
- dev_err(dev, "invalid reg property in %s\n",
- np->full_name);
- return -EINVAL;
- }
-
+ i = 0;
+ for_each_set_bit(cs, &cslines, AT91_MATRIX_EBI_NUM_CS) {
ebid->configs[i].cs = cs;
if (apply) {
@@ -502,9 +519,11 @@ static int at91_ebi_dev_setup(struct at91_ebi *ebi, struct device_node *np,
* Attach the EBI device to the generic SMC logic if at least
* one "atmel,smc-" property is present.
*/
- if (ebi->ebi_csa && ret)
+ if (ebi->ebi_csa && apply)
regmap_field_update_bits(ebi->ebi_csa,
BIT(cs), 0);
+
+ i++;
}
list_add_tail(&ebid->node, &ebi->devs);
@@ -668,7 +687,7 @@ static int at91_ebi_dev_disable(struct at91_ebi *ebi, struct device_node *np)
static int at91_ebi_probe(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
- struct device_node *child, *np = dev->of_node;
+ struct device_node *child, *np = dev->of_node, *smc_np;
const struct of_device_id *match;
struct at91_ebi *ebi;
int ret, reg_cells;
@@ -693,9 +712,22 @@ static int at91_ebi_probe(struct platform_device *pdev)
ebi->clk = clk;
- ebi->smc = syscon_regmap_lookup_by_phandle(np, "atmel,smc");
- if (IS_ERR(ebi->smc))
- return PTR_ERR(ebi->smc);
+ smc_np = of_parse_phandle(dev->of_node, "atmel,smc", 0);
+
+ ebi->smc.regmap = syscon_node_to_regmap(smc_np);
+ if (IS_ERR(ebi->smc.regmap))
+ return PTR_ERR(ebi->smc.regmap);
+
+ ebi->smc.clk = of_clk_get(smc_np, 0);
+ if (IS_ERR(ebi->smc.clk)) {
+ if (PTR_ERR(ebi->smc.clk) != -ENOENT)
+ return PTR_ERR(ebi->smc.clk);
+
+ ebi->smc.clk = NULL;
+ }
+ ret = clk_prepare_enable(ebi->smc.clk);
+ if (ret)
+ return ret;
/*
* The sama5d3 does not provide an EBICSA register and thus does need
diff --git a/drivers/memory/tegra/tegra124-emc.c b/drivers/memory/tegra/tegra124-emc.c
index 06cc781ebac1..392dc8dd481f 100644
--- a/drivers/memory/tegra/tegra124-emc.c
+++ b/drivers/memory/tegra/tegra124-emc.c
@@ -1115,11 +1115,10 @@ static int tegra_emc_probe(struct platform_device *pdev)
}
mc = of_find_device_by_node(np);
+ of_node_put(np);
if (!mc)
return -ENOENT;
- of_node_put(np);
-
emc->mc = platform_get_drvdata(mc);
if (!emc->mc)
return -EPROBE_DEFER;
@@ -1135,9 +1134,7 @@ static int tegra_emc_probe(struct platform_device *pdev)
}
err = tegra_emc_load_timings_from_dt(emc, np);
-
of_node_put(np);
-
if (err)
return err;