summaryrefslogtreecommitdiff
path: root/drivers/misc/pch_phub.c
diff options
context:
space:
mode:
authorTomoya MORINAGA <tomoya-linux@dsn.okisemi.com>2011-06-17 10:13:26 +0900
committerGreg Kroah-Hartman <gregkh@suse.de>2011-07-01 15:33:10 -0700
commit20ae6d0b307963416db0e8433602e5d5c95e942b (patch)
tree72d4b0ebca3ce5a0689f7dc073cfc6ff8f169891 /drivers/misc/pch_phub.c
parente7328ae1848966181a7ac47e8ae6cddbd2cf55f3 (diff)
pch_phub: Fix register miss-setting issue
Register "interrupt delay value" is for GbE which is connected to Bus-m of PCIe. However currently, the value is set for Bus-n. As a result, the value is not set correctly. This patch moves setting the value processing of Bus-n to Bus-m. Signed-off-by: Tomoya MORINAGA <tomoya-linux@dsn.okisemi.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Diffstat (limited to 'drivers/misc/pch_phub.c')
-rw-r--r--drivers/misc/pch_phub.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/misc/pch_phub.c b/drivers/misc/pch_phub.c
index 5fe79df44838..d06cf2f47742 100644
--- a/drivers/misc/pch_phub.c
+++ b/drivers/misc/pch_phub.c
@@ -732,6 +732,8 @@ static int __devinit pch_phub_probe(struct pci_dev *pdev,
* Device8(GbE)
*/
iowrite32(0x000a0000, chip->pch_phub_base_address + 0x14);
+ /* set the interrupt delay value */
+ iowrite32(0x25, chip->pch_phub_base_address + 0x140);
chip->pch_opt_rom_start_address =\
PCH_PHUB_ROM_START_ADDR_ML7223;
chip->pch_mac_start_address = PCH_PHUB_MAC_START_ADDR_ML7223;
@@ -749,8 +751,6 @@ static int __devinit pch_phub_probe(struct pci_dev *pdev,
* Device6(SATA 2):f
*/
iowrite32(0x0000ffa0, chip->pch_phub_base_address + 0x14);
- /* set the interrupt delay value */
- iowrite32(0x25, chip->pch_phub_base_address + 0x140);
chip->pch_opt_rom_start_address =\
PCH_PHUB_ROM_START_ADDR_ML7223;
chip->pch_mac_start_address = PCH_PHUB_MAC_START_ADDR_ML7223;