diff options
| author | Jaehoon Chung <jh80.chung@samsung.com> | 2016-06-21 14:35:38 +0900 |
|---|---|---|
| committer | Ulf Hansson <ulf.hansson@linaro.org> | 2016-07-25 10:34:30 +0200 |
| commit | 7e4bf1bc9543a1760cd93f0e23325e7b0365b30a (patch) | |
| tree | 61408c99323fae3b8be11c12a1b348da1ac8c5e9 /drivers/mmc/host/dw_mmc.h | |
| parent | 16a34574c6ca12bb8fd73ae034acd5b536d3cdaa (diff) | |
mmc: dw_mmc: add the card write threshold for HS400 mode
Since v2.80a, dwmmc controller introduced the card write threshold for
HS400 mode. So CardThrCtl can be supported during write operation, not
only read operation.
(Note: Only use the write threshold when mode is HS400.)
To use more compatible, removed "_rd_" from function name.
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Diffstat (limited to 'drivers/mmc/host/dw_mmc.h')
| -rw-r--r-- | drivers/mmc/host/dw_mmc.h | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/drivers/mmc/host/dw_mmc.h b/drivers/mmc/host/dw_mmc.h index 59610375202d..9e740bc232a8 100644 --- a/drivers/mmc/host/dw_mmc.h +++ b/drivers/mmc/host/dw_mmc.h @@ -15,6 +15,7 @@ #define _DW_MMC_H_ #define DW_MMC_240A 0x240a +#define DW_MMC_280A 0x280a #define SDMMC_CTRL 0x000 #define SDMMC_PWREN 0x004 @@ -175,7 +176,10 @@ /* Version ID register define */ #define SDMMC_GET_VERID(x) ((x) & 0xFFFF) /* Card read threshold */ -#define SDMMC_SET_RD_THLD(v, x) (((v) & 0xFFF) << 16 | (x)) +#define SDMMC_SET_THLD(v, x) (((v) & 0xFFF) << 16 | (x)) +#define SDMMC_CARD_WR_THR_EN BIT(2) +#define SDMMC_CARD_RD_THR_EN BIT(0) +/* UHS-1 register defines */ #define SDMMC_UHS_18V BIT(0) /* All ctrl reset bits */ #define SDMMC_CTRL_ALL_RESET_FLAGS \ |