diff options
| author | Ludovic Barre <ludovic.barre@st.com> | 2018-10-08 14:08:47 +0200 |
|---|---|---|
| committer | Ulf Hansson <ulf.hansson@linaro.org> | 2018-10-09 09:13:04 +0200 |
| commit | 59db5e2d7f9d85ac7d62c1a67d18dc1993c935bd (patch) | |
| tree | 53b9e6c235395c04e8bbd619b45e334d441dea50 /drivers/mmc/host/mmci.h | |
| parent | 9b279941244ce4eaa76d079314e9c174c80fabc3 (diff) | |
mmc: mmci: add variant property to define irq pio mask
This patch allows to define specific pio mask for variants.
Needed to support the STM32 sdmmc variant which has some bits
with different meaning (bits: 21,20,13,12,9)
Signed-off-by: Ludovic Barre <ludovic.barre@st.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Diffstat (limited to 'drivers/mmc/host/mmci.h')
| -rw-r--r-- | drivers/mmc/host/mmci.h | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/drivers/mmc/host/mmci.h b/drivers/mmc/host/mmci.h index 04d021e83dd0..783a7ada4d69 100644 --- a/drivers/mmc/host/mmci.h +++ b/drivers/mmc/host/mmci.h @@ -186,7 +186,7 @@ MCI_CMDRESPENDMASK | MCI_CMDSENTMASK) /* These interrupts are directed to IRQ1 when two IRQ lines are available */ -#define MCI_IRQ1MASK \ +#define MCI_IRQ_PIO_MASK \ (MCI_RXFIFOHALFFULLMASK | MCI_RXDATAAVLBLMASK | \ MCI_TXFIFOHALFEMPTYMASK) @@ -239,6 +239,8 @@ struct mmci_host; * @qcom_dml: enables qcom specific dma glue for dma transfers. * @reversed_irq_handling: handle data irq before cmd irq. * @mmcimask1: true if variant have a MMCIMASK1 register. + * @irq_pio_mask: bitmask used to manage interrupt pio transfert in mmcimask + * register * @start_err: bitmask identifying the STARTBITERR bit inside MMCISTATUS * register. * @opendrain: bitmask identifying the OPENDRAIN bit inside MMCIPOWER register @@ -278,6 +280,7 @@ struct variant_data { u8 qcom_dml:1; u8 reversed_irq_handling:1; u8 mmcimask1:1; + unsigned int irq_pio_mask; u32 start_err; u32 opendrain; void (*init)(struct mmci_host *host); |