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authorArseniy Krasnov <avkrasnov@salutedevices.com>2023-11-20 09:42:39 +0300
committerMiquel Raynal <miquel.raynal@bootlin.com>2023-11-20 10:48:05 +0100
commitacb1fd579efbcac26ce8f9c4fc8bd82f7eaa56e9 (patch)
treeeccefb5bd990490ba308e92fa8c4a70b4f32c589 /drivers/mtd/nand
parent923fb6238cb3ac529aa2bf13b3b1e53762186a8b (diff)
mtd: rawnand: meson: initialize clock register
Clock register must be also initialized during controller probing. If this is not performed (for example by bootloader before) - controller will not work. Signed-off-by: Arseniy Krasnov <avkrasnov@salutedevices.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20231120064239.3304108-1-avkrasnov@salutedevices.com
Diffstat (limited to 'drivers/mtd/nand')
-rw-r--r--drivers/mtd/nand/raw/meson_nand.c4
1 files changed, 3 insertions, 1 deletions
diff --git a/drivers/mtd/nand/raw/meson_nand.c b/drivers/mtd/nand/raw/meson_nand.c
index 71ec4052e52a..7e16a13fb438 100644
--- a/drivers/mtd/nand/raw/meson_nand.c
+++ b/drivers/mtd/nand/raw/meson_nand.c
@@ -90,6 +90,8 @@
/* eMMC clock register, misc control */
#define CLK_SELECT_NAND BIT(31)
+#define CLK_ALWAYS_ON_NAND BIT(24)
+#define CLK_SELECT_FIX_PLL2 BIT(6)
#define NFC_CLK_CYCLE 6
@@ -1154,7 +1156,7 @@ static int meson_nfc_clk_init(struct meson_nfc *nfc)
return PTR_ERR(nfc->nand_clk);
/* init SD_EMMC_CLOCK to sane defaults w/min clock rate */
- writel(CLK_SELECT_NAND | readl(nfc->reg_clk),
+ writel(CLK_ALWAYS_ON_NAND | CLK_SELECT_NAND | CLK_SELECT_FIX_PLL2,
nfc->reg_clk);
ret = clk_prepare_enable(nfc->core_clk);