diff options
| author | Amit Kumar Mahapatra <amit.kumar-mahapatra@amd.com> | 2023-06-30 19:52:33 +0530 |
|---|---|---|
| committer | Tudor Ambarus <tudor.ambarus@linaro.org> | 2023-07-13 05:32:09 +0300 |
| commit | 18d7d01a0a0eb32b78149c8259bf49504d5fa4e0 (patch) | |
| tree | ce168afc57a7613f5f23ce9e5fb420832901996e /drivers/mtd/spi-nor/swp.c | |
| parent | cfc2928cb213d5c20b6313abb2d603c0c60d7637 (diff) | |
mtd: spi-nor: Avoid setting SRWD bit in SR if WP# signal not connected
Setting the status register write disable (SRWD) bit in the status
register (SR) with WP# signal of the flash left floating or wrongly tied to
GND (that includes internal pull-downs), will configure the SR permanently
as read-only. If WP# signal is left floating or wrongly tied to GND, avoid
setting SRWD bit while writing the SR during flash protection.
Signed-off-by: Amit Kumar Mahapatra <amit.kumar-mahapatra@amd.com>
Reviewed-by: Michael Walle <michael@walle.cc>
Link: https://lore.kernel.org/r/20230630142233.63585-3-amit.kumar-mahapatra@amd.com
Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>
Diffstat (limited to 'drivers/mtd/spi-nor/swp.c')
| -rw-r--r-- | drivers/mtd/spi-nor/swp.c | 9 |
1 files changed, 7 insertions, 2 deletions
diff --git a/drivers/mtd/spi-nor/swp.c b/drivers/mtd/spi-nor/swp.c index 0ba716e84377..5ab9d5324860 100644 --- a/drivers/mtd/spi-nor/swp.c +++ b/drivers/mtd/spi-nor/swp.c @@ -214,8 +214,13 @@ static int spi_nor_sr_lock(struct spi_nor *nor, loff_t ofs, uint64_t len) status_new = (status_old & ~mask & ~tb_mask) | val; - /* Disallow further writes if WP pin is asserted */ - status_new |= SR_SRWD; + /* + * Disallow further writes if WP# pin is neither left floating nor + * wrongly tied to GND (that includes internal pull-downs). + * WP# pin hard strapped to GND can be a valid use case. + */ + if (!(nor->flags & SNOR_F_NO_WP)) + status_new |= SR_SRWD; if (!use_top) status_new |= tb_mask; |