diff options
author | Richard Weinberger <richard@nod.at> | 2019-05-05 11:54:11 +0200 |
---|---|---|
committer | Richard Weinberger <richard@nod.at> | 2019-05-05 11:54:11 +0200 |
commit | 1c7cbd634763a0f0727d425c38486f0a3a9339a7 (patch) | |
tree | 6fb09b8fcae59059c36f36437c8fd18cf0db983d /drivers/mtd/tests/mtd_nandecctest.c | |
parent | 37624b58542fb9f2d9a70e6ea006ef8a5f66c30b (diff) | |
parent | 1c14fe2167ef4294b41949bcc372ea39c0510c00 (diff) |
Merge tag 'nand/for-5.2' of git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux into mtd/next
NAND core changes:
- Support having the bad block markers in either the first, second or
last page of a block. The combination of all three location is now
possible.
- Constification of NAND_OP_PARSER(_PATTERN) elements.
- Generic NAND DT bindings changed to yaml format (can be used to
check the proposed bindings. First platform to be fully supported:
sunxi.
- Stopped using several legacy hooks.
- Preparation to use the generic NAND layer with the addition of
several helpers and the removal of the struct nand_chip from generic
functions.
- Kconfig cleanup to prepare the introduction of external ECC engines
support.
- Fallthrough comments.
- Introduction of the SPI-mem dirmap API for SPI-NAND devices.
Raw NAND controller drivers changes:
- nandsim:
* Switch to ->exec-op().
- meson:
* Misc cleanups and fixes.
* New OOB layout.
- Sunxi:
* A23/A33 NAND DMA support.
- Ingenic:
* Full reorganization and cleanup.
* Clear separation between NAND controller and ECC engine.
* Support JZ4740 an JZ4725B.
- Denali:
* Clear controller/chip separation.
* ->exec_op() migration.
* Various cleanups.
- fsl_elbc:
* Enable software ECC support.
- Atmel:
* Sam9x60 support.
- GPMI:
* Introduce the GPMI_IS_MXS() macro.
- Various trivial/spelling/coding style fixes.
Diffstat (limited to 'drivers/mtd/tests/mtd_nandecctest.c')
-rw-r--r-- | drivers/mtd/tests/mtd_nandecctest.c | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/drivers/mtd/tests/mtd_nandecctest.c b/drivers/mtd/tests/mtd_nandecctest.c index c71523e94580..73b06304c975 100644 --- a/drivers/mtd/tests/mtd_nandecctest.c +++ b/drivers/mtd/tests/mtd_nandecctest.c @@ -21,7 +21,7 @@ * or detected. */ -#if IS_ENABLED(CONFIG_MTD_NAND) +#if IS_ENABLED(CONFIG_MTD_RAW_NAND) struct nand_ecc_test { const char *name; @@ -122,9 +122,9 @@ static int no_bit_error_verify(void *error_data, void *error_ecc, int ret; __nand_calculate_ecc(error_data, size, calc_ecc, - IS_ENABLED(CONFIG_MTD_NAND_ECC_SMC)); + IS_ENABLED(CONFIG_MTD_NAND_ECC_SW_HAMMING_SMC)); ret = __nand_correct_data(error_data, error_ecc, calc_ecc, size, - IS_ENABLED(CONFIG_MTD_NAND_ECC_SMC)); + IS_ENABLED(CONFIG_MTD_NAND_ECC_SW_HAMMING_SMC)); if (ret == 0 && !memcmp(correct_data, error_data, size)) return 0; @@ -152,9 +152,9 @@ static int single_bit_error_correct(void *error_data, void *error_ecc, int ret; __nand_calculate_ecc(error_data, size, calc_ecc, - IS_ENABLED(CONFIG_MTD_NAND_ECC_SMC)); + IS_ENABLED(CONFIG_MTD_NAND_ECC_SW_HAMMING_SMC)); ret = __nand_correct_data(error_data, error_ecc, calc_ecc, size, - IS_ENABLED(CONFIG_MTD_NAND_ECC_SMC)); + IS_ENABLED(CONFIG_MTD_NAND_ECC_SW_HAMMING_SMC)); if (ret == 1 && !memcmp(correct_data, error_data, size)) return 0; @@ -189,9 +189,9 @@ static int double_bit_error_detect(void *error_data, void *error_ecc, int ret; __nand_calculate_ecc(error_data, size, calc_ecc, - IS_ENABLED(CONFIG_MTD_NAND_ECC_SMC)); + IS_ENABLED(CONFIG_MTD_NAND_ECC_SW_HAMMING_SMC)); ret = __nand_correct_data(error_data, error_ecc, calc_ecc, size, - IS_ENABLED(CONFIG_MTD_NAND_ECC_SMC)); + IS_ENABLED(CONFIG_MTD_NAND_ECC_SW_HAMMING_SMC)); return (ret == -EBADMSG) ? 0 : -EINVAL; } @@ -266,7 +266,7 @@ static int nand_ecc_test_run(const size_t size) prandom_bytes(correct_data, size); __nand_calculate_ecc(correct_data, size, correct_ecc, - IS_ENABLED(CONFIG_MTD_NAND_ECC_SMC)); + IS_ENABLED(CONFIG_MTD_NAND_ECC_SW_HAMMING_SMC)); for (i = 0; i < ARRAY_SIZE(nand_ecc_test); i++) { nand_ecc_test[i].prepare(error_data, error_ecc, |