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authorSergei Shtylyov <sergei.shtylyov@cogentembedded.com>2019-01-16 20:53:25 +0300
committerBoris Brezillon <bbrezillon@kernel.org>2019-01-23 13:47:39 +0100
commita2126b0a010905e57ec8c855c58596098a3839ab (patch)
tree5edd25996101a9d1a9f3d57a4578cef74118a265 /drivers/mtd
parentdfd2b74530e90831afdc4b361623de4be06018ea (diff)
mtd: spi-nor: refine Spansion S25FL512S ID
Spansion S25FL512S ID is erroneously using 5-byte JEDEC ID, while the chip family ID is stored in the 6th byte. Due to using only 5-byte ID, it's also covering S25FS512S and now that we have added 6-byte ID for that chip, we can convert S25FL512S to using a proper 6-byte ID as well... Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com> Signed-off-by: Boris Brezillon <bbrezillon@kernel.org>
Diffstat (limited to 'drivers/mtd')
-rw-r--r--drivers/mtd/spi-nor/spi-nor.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c
index 14f905fc94e9..13a5055e5f3f 100644
--- a/drivers/mtd/spi-nor/spi-nor.c
+++ b/drivers/mtd/spi-nor/spi-nor.c
@@ -1893,8 +1893,8 @@ static const struct flash_info spi_nor_ids[] = {
{ "s25sl064p", INFO(0x010216, 0x4d00, 64 * 1024, 128, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
{ "s25fl256s0", INFO(0x010219, 0x4d00, 256 * 1024, 128, USE_CLSR) },
{ "s25fl256s1", INFO(0x010219, 0x4d01, 64 * 1024, 512, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | USE_CLSR) },
+ { "s25fl512s", INFO6(0x010220, 0x4d0080, 256 * 1024, 256, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | USE_CLSR) },
{ "s25fs512s", INFO6(0x010220, 0x4d0081, 256 * 1024, 256, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | USE_CLSR) },
- { "s25fl512s", INFO(0x010220, 0x4d00, 256 * 1024, 256, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | USE_CLSR) },
{ "s70fl01gs", INFO(0x010221, 0x4d00, 256 * 1024, 256, 0) },
{ "s25sl12800", INFO(0x012018, 0x0300, 256 * 1024, 64, 0) },
{ "s25sl12801", INFO(0x012018, 0x0301, 64 * 1024, 256, 0) },