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authorYicong Yang <yangyicong@hisilicon.com>2020-07-06 17:22:36 +0800
committerTudor Ambarus <tudor.ambarus@microchip.com>2020-07-13 12:09:52 +0300
commitcc59e6bb6cd69d3347c06ccce088c5c6052e041e (patch)
treefd3cd1bd329abe7802c348e42af6829e9ae046ff /drivers/mtd
parentbe192209d5a33c912caa4a05d6f92b89328d8db8 (diff)
mtd: spi-nor: Disable the flash quad mode in spi_nor_restore()
If the flash's quad mode is enabled, it'll remain in the quad mode when it's removed. If we drive the flash next time in Standard/Dual SPI mode, the QE bit is not cleared and the function of flash's WP# and RESET#/HOLD# have been switched to IO2 and IO3 and are not restored. Disable the Quad mode in spi_nor_restore(), then the flash's QE bit will be cleared when removed. This will make sure the flash always enter the Standard/Dual SPI mode when loaded. Signed-off-by: Yicong Yang <yangyicong@hisilicon.com> Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Reviewed-by: Pratyush Yadav <p.yadav@ti.com> Link: https://lore.kernel.org/r/1594027356-19088-3-git-send-email-yangyicong@hisilicon.com
Diffstat (limited to 'drivers/mtd')
-rw-r--r--drivers/mtd/spi-nor/core.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c
index ab8f55438e21..65eff4ce6ab1 100644
--- a/drivers/mtd/spi-nor/core.c
+++ b/drivers/mtd/spi-nor/core.c
@@ -3000,6 +3000,8 @@ void spi_nor_restore(struct spi_nor *nor)
if (nor->addr_width == 4 && !(nor->flags & SNOR_F_4B_OPCODES) &&
nor->flags & SNOR_F_BROKEN_RESET)
nor->params->set_4byte_addr_mode(nor, false);
+
+ spi_nor_quad_enable(nor, false);
}
EXPORT_SYMBOL_GPL(spi_nor_restore);