diff options
| author | Stephane Grosjean <s.grosjean@peak-system.com> | 2018-06-21 15:23:30 +0200 |
|---|---|---|
| committer | Marc Kleine-Budde <mkl@pengutronix.de> | 2018-07-27 10:40:18 +0200 |
| commit | 5592cd0390741e6fecfc7908baaeadb4682f3c48 (patch) | |
| tree | 01536d73e949f792b35fbc5f55a015bad222e58e /drivers/net/can | |
| parent | d31f8513f252e25be3d4e64fe99d1efd5da3c83a (diff) | |
can: peak_canfd: rearrange the way resources are released
This patch improves the sequence the resources are released by, first,
- disabling the IRQ in the controller, then by
- resetting the DMA logic, and finally, by
- adding a read cycle to ensure that the above commands have been received
before freeing the system interrupt.
Signed-off-by: Stephane Grosjean <s.grosjean@peak-system.com>
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Diffstat (limited to 'drivers/net/can')
| -rw-r--r-- | drivers/net/can/peak_canfd/peak_pciefd_main.c | 9 |
1 files changed, 6 insertions, 3 deletions
diff --git a/drivers/net/can/peak_canfd/peak_pciefd_main.c b/drivers/net/can/peak_canfd/peak_pciefd_main.c index b09961b1eeef..c458d5fdc8d3 100644 --- a/drivers/net/can/peak_canfd/peak_pciefd_main.c +++ b/drivers/net/can/peak_canfd/peak_pciefd_main.c @@ -488,13 +488,16 @@ static int pciefd_post_cmd(struct peak_canfd_priv *ucan) /* controller now in reset mode: */ + /* disable IRQ for this CAN */ + pciefd_can_writereg(priv, CANFD_CTL_IEN_BIT, + PCIEFD_REG_CAN_RX_CTL_CLR); + /* stop and reset DMA addresses in Tx/Rx engines */ pciefd_can_clear_tx_dma(priv); pciefd_can_clear_rx_dma(priv); - /* disable IRQ for this CAN */ - pciefd_can_writereg(priv, CANFD_CTL_IEN_BIT, - PCIEFD_REG_CAN_RX_CTL_CLR); + /* wait for above commands to complete (read cycle) */ + (void)pciefd_sys_readreg(priv->board, PCIEFD_REG_SYS_VER1); free_irq(priv->ucan.ndev->irq, priv); |