diff options
| author | Arun Ramadoss <arun.ramadoss@microchip.com> | 2023-01-20 10:51:35 +0530 |
|---|---|---|
| committer | Jakub Kicinski <kuba@kernel.org> | 2023-01-23 22:12:35 -0800 |
| commit | 71d7920fb2d1d6cdaa6db58426783be02c9cb7bb (patch) | |
| tree | 8443658cd4f29cf001d0cd936855b662f449f8f8 /drivers/net/dsa/microchip/ksz9477_reg.h | |
| parent | e30f33a5f5c74f278feaa57517d851874dfc640f (diff) | |
net: dsa: microchip: add support for credit based shaper
KSZ9477, KSZ9567, KSZ9563, KSZ8563 and LAN937x supports Credit based
shaper. To differentiate the chip supporting cbs, tc_cbs_supported
flag is introduced in ksz_chip_data.
And KSZ series has 16bit Credit increment registers whereas LAN937x has
24bit register. The value to be programmed in the credit increment is
determined using the successive multiplication method to convert decimal
fraction to hexadecimal fraction.
For example: if idleslope is 10000 and sendslope is -90000, then
bandwidth is 10000 - (-90000) = 100000.
The 10% bandwidth of 100Mbps means 10/100 = 0.1(decimal). This value has
to be converted to hexa.
1) 0.1 * 16 = 1.6 --> fraction 0.6 Carry = 1 (MSB)
2) 0.6 * 16 = 9.6 --> fraction 0.6 Carry = 9
3) 0.6 * 16 = 9.6 --> fraction 0.6 Carry = 9
4) 0.6 * 16 = 9.6 --> fraction 0.6 Carry = 9
5) 0.6 * 16 = 9.6 --> fraction 0.6 Carry = 9
6) 0.6 * 16 = 9.6 --> fraction 0.6 Carry = 9 (LSB)
Now 0.1(decimal) becomes 0.199999(Hex).
If it is LAN937x, 24 bit value will be programmed to Credit Inc
register, 0x199999. For others 16 bit value will be prgrammed, 0x1999.
Signed-off-by: Arun Ramadoss <arun.ramadoss@microchip.com>
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
Diffstat (limited to 'drivers/net/dsa/microchip/ksz9477_reg.h')
| -rw-r--r-- | drivers/net/dsa/microchip/ksz9477_reg.h | 27 |
1 files changed, 2 insertions, 25 deletions
diff --git a/drivers/net/dsa/microchip/ksz9477_reg.h b/drivers/net/dsa/microchip/ksz9477_reg.h index b433a529cfec..cba3dba58bc3 100644 --- a/drivers/net/dsa/microchip/ksz9477_reg.h +++ b/drivers/net/dsa/microchip/ksz9477_reg.h @@ -1484,33 +1484,10 @@ /* 9 - Shaping */ -#define REG_PORT_MTI_QUEUE_INDEX__4 0x0900 +#define REG_PORT_MTI_QUEUE_CTRL_0__4 0x0904 -#define REG_PORT_MTI_QUEUE_CTRL_0__4 0x0904 +#define MTI_PVID_REPLACE BIT(0) -#define MTI_PVID_REPLACE BIT(0) - -#define REG_PORT_MTI_QUEUE_CTRL_0 0x0914 - -#define MTI_SCHEDULE_MODE_M 0x3 -#define MTI_SCHEDULE_MODE_S 6 -#define MTI_SCHEDULE_STRICT_PRIO 0 -#define MTI_SCHEDULE_WRR 2 -#define MTI_SHAPING_M 0x3 -#define MTI_SHAPING_S 4 -#define MTI_SHAPING_OFF 0 -#define MTI_SHAPING_SRP 1 -#define MTI_SHAPING_TIME_AWARE 2 - -#define REG_PORT_MTI_QUEUE_CTRL_1 0x0915 - -#define MTI_TX_RATIO_M (BIT(7) - 1) - -#define REG_PORT_MTI_QUEUE_CTRL_2__2 0x0916 -#define REG_PORT_MTI_HI_WATER_MARK 0x0916 -#define REG_PORT_MTI_QUEUE_CTRL_3__2 0x0918 -#define REG_PORT_MTI_LO_WATER_MARK 0x0918 -#define REG_PORT_MTI_QUEUE_CTRL_4__2 0x091A #define REG_PORT_MTI_CREDIT_INCREMENT 0x091A /* A - QM */ |