diff options
| author | Vivien Didelot <vivien.didelot@savoirfairelinux.com> | 2017-06-12 12:37:35 -0400 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2017-06-13 11:23:09 -0400 |
| commit | 6c96bbfdd08d422395c06516617e006833f7b540 (patch) | |
| tree | 86203cd7d1704e5e23c4450ca389ea5c106c5df9 /drivers/net/dsa/mv88e6xxx/port.c | |
| parent | 5ee55577cfe4a3ef6ae34d804806b1c6c9ae159a (diff) | |
net: dsa: mv88e6xxx: prefix Port Jamming macros
For implicit namespacing and clarity, prefix the common Port Jamming
Control Register macros with MV88E6XXX_PORT_JAM_CTL and the ones which
differ between implementations with a chosen reference model
(e.g. MV88E6097_PORT_JAM_CTL.)
The 88E6390 family renamed the register to Flow Control and turned it
into an indirect table. Document that as well.
Document the register and prefer ordered hex masks values for all
Marvell 16-bit registers.
Signed-off-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/dsa/mv88e6xxx/port.c')
| -rw-r--r-- | drivers/net/dsa/mv88e6xxx/port.c | 15 |
1 files changed, 9 insertions, 6 deletions
diff --git a/drivers/net/dsa/mv88e6xxx/port.c b/drivers/net/dsa/mv88e6xxx/port.c index 60c31b6c2f47..615b8843ad8e 100644 --- a/drivers/net/dsa/mv88e6xxx/port.c +++ b/drivers/net/dsa/mv88e6xxx/port.c @@ -376,7 +376,7 @@ int mv88e6xxx_port_get_cmode(struct mv88e6xxx_chip *chip, int port, u8 *cmode) return 0; } -/* Offset 0x02: Pause Control +/* Offset 0x02: Jamming Control * * Do not limit the period of time that this port can be paused for by * the remote end or the period of time that this port can pause the @@ -385,7 +385,8 @@ int mv88e6xxx_port_get_cmode(struct mv88e6xxx_chip *chip, int port, u8 *cmode) int mv88e6097_port_pause_limit(struct mv88e6xxx_chip *chip, int port, u8 in, u8 out) { - return mv88e6xxx_port_write(chip, port, PORT_PAUSE_CTRL, out << 8 | in); + return mv88e6xxx_port_write(chip, port, MV88E6097_PORT_JAM_CTL, + out << 8 | in); } int mv88e6390_port_pause_limit(struct mv88e6xxx_chip *chip, int port, u8 in, @@ -393,13 +394,15 @@ int mv88e6390_port_pause_limit(struct mv88e6xxx_chip *chip, int port, u8 in, { int err; - err = mv88e6xxx_port_write(chip, port, PORT_PAUSE_CTRL, - PORT_FLOW_CTRL_LIMIT_IN | in); + err = mv88e6xxx_port_write(chip, port, MV88E6390_PORT_FLOW_CTL, + MV88E6390_PORT_FLOW_CTL_UPDATE | + MV88E6390_PORT_FLOW_CTL_LIMIT_IN | in); if (err) return err; - return mv88e6xxx_port_write(chip, port, PORT_PAUSE_CTRL, - PORT_FLOW_CTRL_LIMIT_OUT | out); + return mv88e6xxx_port_write(chip, port, MV88E6390_PORT_FLOW_CTL, + MV88E6390_PORT_FLOW_CTL_UPDATE | + MV88E6390_PORT_FLOW_CTL_LIMIT_OUT | out); } /* Offset 0x04: Port Control Register */ |