diff options
| author | Ansuel Smith <ansuelsmth@gmail.com> | 2021-10-14 00:39:13 +0200 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2021-10-15 11:06:37 +0100 |
| commit | bbc4799e8bb6c397e3b3fec13de68e179f5db9ff (patch) | |
| tree | c386e628cf0d7cb5d4693b8e2222cf3496d03bbd /drivers/net/dsa/qca8k.c | |
| parent | 13ad5ccc093ff448b99ac7e138e91e78796adb48 (diff) | |
net: dsa: qca8k: add explicit SGMII PLL enable
Support enabling PLL on the SGMII CPU port. Some device require this
special configuration or no traffic is transmitted and the switch
doesn't work at all. A dedicated binding is added to the CPU node
port to apply the correct reg on mac config.
Fail to correctly configure sgmii with qca8327 switch and warn if pll is
used on qca8337 with a revision greater than 1.
Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/dsa/qca8k.c')
| -rw-r--r-- | drivers/net/dsa/qca8k.c | 19 |
1 files changed, 17 insertions, 2 deletions
diff --git a/drivers/net/dsa/qca8k.c b/drivers/net/dsa/qca8k.c index 67999d3619e8..e0a16fe6a298 100644 --- a/drivers/net/dsa/qca8k.c +++ b/drivers/net/dsa/qca8k.c @@ -1002,6 +1002,18 @@ qca8k_parse_port_config(struct qca8k_priv *priv) if (of_property_read_bool(port_dn, "qca,sgmii-rxclk-falling-edge")) priv->sgmii_rx_clk_falling_edge = true; + if (of_property_read_bool(port_dn, "qca,sgmii-enable-pll")) { + priv->sgmii_enable_pll = true; + + if (priv->switch_id == QCA8K_ID_QCA8327) { + dev_err(priv->dev, "SGMII PLL should NOT be enabled for qca8327. Aborting enabling"); + priv->sgmii_enable_pll = false; + } + + if (priv->switch_revision < 2) + dev_warn(priv->dev, "SGMII PLL should NOT be enabled for qca8337 with revision 2 or more."); + } + break; default: continue; @@ -1312,8 +1324,11 @@ qca8k_phylink_mac_config(struct dsa_switch *ds, int port, unsigned int mode, if (ret) return; - val |= QCA8K_SGMII_EN_PLL | QCA8K_SGMII_EN_RX | - QCA8K_SGMII_EN_TX | QCA8K_SGMII_EN_SD; + val |= QCA8K_SGMII_EN_SD; + + if (priv->sgmii_enable_pll) + val |= QCA8K_SGMII_EN_PLL | QCA8K_SGMII_EN_RX | + QCA8K_SGMII_EN_TX; if (dsa_is_cpu_port(ds, port)) { /* CPU port, we're talking to the CPU MAC, be a PHY */ |